公开(公告)号：US11348651B2

公开(公告)日：2022-05-31

申请号：US16147119

申请日：2018-09-28

Applicant: Intel Corporation

Inventor： Sarvesh Kulkarni ,  Vincent Dorgan ,  Inanc Meric ,  Venkata Krishna Rao Vangara ,  Uddalak Bhattacharya ,  Jeffrey Hicks

IPC: G11C17/16 ,  G11C17/18

Abstract: Memory cell circuitry is disclosed. The memory cell circuitry includes a first transistor configured to have a threshold voltage of the first transistor modulated by hot carrier injection, a second transistor coupled to the first transistor and configured to have a threshold voltage of the second transistor modulated by hot carrier injection, a word line coupled to a gate of the first transistor and to a gate of the second transistor, a first bit line coupled to the first transistor and a second bit line coupled to the second transistor. In addition, the memory cell circuitry includes a source line coupled to the drain of the first transistor and to the drain of the second transistor, the word line and the source line configured to cause hot carrier injection (HCI) into the first transistor when a first supply voltage is applied to the word line and the source line, and the second bit line is floated and the first bit line is grounded. The word line and the source line are configured to cause hot carrier injection into the second transistor when the first supply voltage is applied to the word line and the source line, and the first bit line is floated and the second bit line is grounded. Methods utilizing this technology for generating a multi-time programmable non-volatile memory and a random number generator for physical unclonable function applications are included in this disclosure.

公开(公告)号：US20230162772A1

公开(公告)日：2023-05-25

申请号：US17706124

申请日：2022-03-28

Applicant: Intel Corporation

Inventor： Yu-Lin Chao ,  Zhanping Chen ,  Sarvesh Kulkarni ,  Rachael Parker ,  Jyothi Bhaskarr Velamala

IPC: G11C7/24 ,  G11C17/16 ,  G11C17/18

CPC classification number: G11C7/24 ,  G11C17/16 ,  G11C17/18

Abstract: Hot carrier injection (HCI) may be used to provide various improvements for one-time programmable (OTP) read-only memory (ROM) or physical unclonable function (PUF) circuits. HCI may be used to write a memory bit (e.g., logical 0 or 1), which may be used in OTP ROM. HCI may be used to provide improved programmable ROM (PROM) memory devices, such as to facilitate programming or to increase sensing window. HCI may also be used to write a memory bit in a PUF circuit. HCI may provide a cross-foundry portable PUF circuit that has an associated adjustable bit error rate (BER), which may be used to secure root key generation, or may be used to provide a unique identification (ID) for fuse replacement.