公开(公告)号：US20230197836A1

公开(公告)日：2023-06-22

申请号：US17557128

申请日：2021-12-21

Applicant: Intel Corporation

Inventor： Carl Hugo Naylor ,  Christopher J. Jezewski ,  Jeffery D. Bielefeld ,  Jiun-Ruey Chen ,  Ramanan V. CHEBIAM ,  Mauro J. Kobrinsky ,  Matthew V. Metz ,  Scott B. Clendenning ,  Sudurat Lee ,  Kevin P. O'Brien ,  Kirby Kurtis Maxey ,  Ashish Verma Penumatcha ,  Chelsey Jane Dorow ,  Uygar E. Avci

IPC: H01L29/76 ,  H01L29/06 ,  H01L29/24 ,  H01L29/423 ,  H01L29/417 ,  H01L29/786 ,  H01L21/02 ,  H01L29/40 ,  H01L29/66

CPC classification number: H01L29/7606 ,  H01L29/0665 ,  H01L29/24 ,  H01L29/42392 ,  H01L29/41733 ,  H01L29/78696 ,  H01L21/0259 ,  H01L21/02568 ,  H01L29/401 ,  H01L29/66969

Abstract: Described herein are integrated circuit devices with conductive regions formed from MX or MAX materials. MAX materials are layered, hexagonal carbides and nitrides that include an early transition metal (M) and an A group element (A). MX materials remove the A group element. MAX and MX materials are highly conductive, and their two-dimensional layer structure allows very thin layers to be formed. MAX or MX materials can be used to form several conductive elements of IC circuits, including contacts, interconnects, or liners or barrier regions for contacts or interconnects.