公开(公告)号：US20160091941A1

公开(公告)日：2016-03-31

申请号：US14497476

申请日：2014-09-26

Applicant: Intel Corporation

Inventor： Sunil Kumar C.R. ,  Aruna Kumar ,  Prakash K. Radhakrishnan

IPC: G06F1/26 ,  G06F1/32

CPC classification number: G06F1/266 ,  G06F1/26 ,  G06F1/3225 ,  G06F1/3243 ,  G06F1/3293 ,  G06F1/3296 ,  G06F15/163

Abstract: In an embodiment, processor includes at least one logic circuit to generate information to be output from the processor; an input/output (IO) interface circuit coupled to the at least one logic circuit to receive and transmit the information; a voltage regulator to provide an operating voltage to the IO interface circuit; and a controller to control the voltage regulator to provide the operating voltage at an adjusted level from a nominal operating voltage based on a process variation of at least a portion of a die including the IO interface circuit. Other embodiments are described and claimed.

Abstract translation: 在一个实施例中，处理器包括至少一个逻辑电路以产生要从处理器输出的信息; 耦合到所述至少一个逻辑电路以接收和发送所述信息的输入/输出（IO）接口电路; 电压调节器，用于向IO接口电路提供工作电压; 以及控制器，用于控制所述电压调节器，以基于包括所述IO接口电路的管芯的至少一部分的工艺变化，将所述工作电压提供在来自标称工作电压的调整水平。 描述和要求保护其他实施例。