公开(公告)号：US20250107147A1

公开(公告)日：2025-03-27

申请号：US18476248

申请日：2023-09-27

Applicant: Intel Corporation

Inventor： Mahmut Sami Kavrik ,  Uygar E. Avci ,  Pratyush P. Buragohain ,  Chelsey Dorow ,  Jack T. Kavalieros ,  Chia-Ching Lin ,  Matthew V. Metz ,  Wouter Mortelmans ,  Carl Hugo Naylor ,  Kevin P. O'Brien ,  Ashish Verma Penumatcha ,  Carly Rogan ,  Rachel A. Steinhardt ,  Tristan A. Tronic ,  Andrey Vyatskikh

IPC: H01L29/786 ,  H01L21/02 ,  H01L21/46 ,  H01L27/092 ,  H01L29/24 ,  H01L29/51 ,  H01L29/66 ,  H01L29/76

Abstract: Hybrid bonding interconnect (HBI) architectures for scalability. Embodiments implement a bonding layer on a semiconductor die that includes a thick oxide layer overlaid with a thin layer of a hermetic material including silicon and at least one of carbon and nitrogen. The conductive bonds of the semiconductor die are placed in the thick oxide layer and exposed at the surface of the hermetic material. Some embodiments implement a non-bonding moisture seal ring (MSR) structure.