公开(公告)号：US10346145B2

公开(公告)日：2019-07-09

申请号：US15632123

申请日：2017-06-23

申请人： INTEL CORPORATION

发明人： Yongzhi Zhang ,  Kent D. Glossop

IPC分类号： G06F17/50 ,  G06F9/44 ,  G06F17/30 ,  G06F8/41 ,  G06F9/32 ,  G06F8/30

摘要： Compilers for compiling computer programs and apparatuses including compilers are disclosed herein. A compiler may include one or more analyzers to parse and analyze source instructions of a computer program including identification of nested loops of the computer program. The compiler may also include a code generator coupled to the one or more analyzers to generate and output executable code for the computer program that executes on a data flow machine, including a data flow graph, based at least in part on results of the analysis. In embodiments, the executable code may include executable code that recursively computes predicates of identified nested loops for use to generate control signal for the data flow graph to allow execution of each loop to start when the loop's predicate is available, independent of whether any other loop is in execution or not. Other embodiments may be disclosed or claimed.

公开(公告)号：US10402176B2

公开(公告)日：2019-09-03

申请号：US15855964

申请日：2017-12-27

申请人： Intel Corporation

发明人： Kent Glossop ,  Kermin Fleming ,  Yongzhi Zhang ,  Simon Steely, Jr. ,  Jim Sukha ,  Uma Srinivasan

IPC分类号： G06F9/44 ,  G06F8/41

摘要： Methods, apparatus, systems and articles of manufacture to compiler compile code to generate dataflow code are described. An example compiler apparatus includes an intermediate representation transformer to transform input software code to intermediate representation code; an instruction selector to insert machine instructions of a target execution platform in the intermediate representation code to generate machine intermediate representation code; and a target machine transformer to: convert a portion of the machine intermediate representation code to dataflow code to generate dataflow intermediate representation code; and allocate registers within the dataflow intermediate representation code.

公开(公告)号：US20190042217A1

公开(公告)日：2019-02-07

申请号：US15855964

申请日：2017-12-27

申请人： Intel Corporation

发明人： Kent Glossop ,  Kermin Fleming ,  Yongzhi Zhang ,  Simon Steely, JR. ,  James Sukha ,  Uma Srinivasan

IPC分类号： G06F8/41

CPC分类号： G06F8/433 ,  G06F8/441 ,  G06F8/443 ,  G06F8/4441 ,  G06F8/447

摘要： Methods, apparatus, systems and articles of manufacture to compiler compile code to generate dataflow code are described. An example compiler apparatus includes an intermediate representation transformer to transform input software code to intermediate representation code; an instruction selector to insert machine instructions of a target execution platform in the intermediate representation code to generate machine intermediate representation code; and a target machine transformer to: convert a portion of the machine intermediate representation code to dataflow code to generate dataflow intermediate representation code; and allocate registers within the dataflow intermediate representation code.

公开(公告)号：US11200186B2

公开(公告)日：2021-12-14

申请号：US16024854

申请日：2018-06-30

申请人： Intel Corporation

发明人： Kermin E. Fleming, Jr. ,  Simon C. Steely, Jr. ,  Kent D. Glossop ,  Mitchell Diamond ,  Benjamin Keen ,  Dennis Bradford ,  Fabrizio Petrini ,  Barry Tannenbaum ,  Yongzhi Zhang

IPC分类号： G06F13/40 ,  G06F9/30 ,  G06F15/78

摘要： Systems, methods, and apparatuses relating to operations in a configurable spatial accelerator are described. In one embodiment, a configurable spatial accelerator includes a first processing element that includes a configuration register within the first processing element to store a configuration value that causes the first processing element to perform an operation according to the configuration value, a plurality of input queues, an input controller to control enqueue and dequeue of values into the plurality of input queues according to the configuration value, a plurality of output queues, and an output controller to control enqueue and dequeue of values into the plurality of output queues according to the configuration value.

公开(公告)号：US20180349115A1

公开(公告)日：2018-12-06

申请号：US15609583

申请日：2017-05-31

申请人： Intel Corporation

发明人： Yongzhi Zhang

IPC分类号： G06F9/45 ,  G06F9/44

CPC分类号： G06F8/433 ,  G06F8/20 ,  G06F15/825

摘要： An apparatus for automatically converting a control flow program into a data flow program comprises a non-transitory machine-readable medium and a translator stored in the machine-readable medium. The translator, when executed by a data processing system, enables the data processing system to (a) automatically generate a control dependency graph for a control flow program, (b) automatically generate a data flow graph based at least in part on the control dependency graph, and (c) automatically generate a data flow program based at least in part on the data flow graph. In one embodiment or scenario, the translator may also automatically insert a switch instruction into the data flow program, in response to a determination that a variable of the control flow program is defined in one control dependency region and used in a different control dependency region. Other embodiments are described and claimed.

公开(公告)号：US11593295B2

公开(公告)日：2023-02-28

申请号：US17550875

申请日：2021-12-14

申请人： Intel Corporation

发明人： Kermin E. Fleming, Jr. ,  Simon C. Steely, Jr. ,  Kent D. Glossop ,  Mitchell Diamond ,  Benjamin Keen ,  Dennis Bradford ,  Fabrizio Petrini ,  Barry Tannenbaum ,  Yongzhi Zhang

IPC分类号： G06F13/40 ,  G06F9/30 ,  G06F15/78

摘要： Systems, methods, and apparatuses relating to operations in a configurable spatial accelerator are described. In one embodiment, a configurable spatial accelerator includes a first processing element that includes a configuration register within the first processing element to store a configuration value that causes the first processing element to perform an operation according to the configuration value, a plurality of input queues, an input controller to control enqueue and dequeue of values into the plurality of input queues according to the configuration value, a plurality of output queues, and an output controller to control enqueue and dequeue of values into the plurality of output queues according to the configuration value.

公开(公告)号：US10776087B2

公开(公告)日：2020-09-15

申请号：US16017000

申请日：2018-06-25

申请人： INTEL CORPORATION

发明人： Yongzhi Zhang

IPC分类号： G06F8/41 ,  G06F8/30

摘要： Embodiments are directed to techniques to determine dataflow graph instructions comprising one or more pick/switch instruction pairs and generate a reverse static single assignment graph based on the dataflow graph instructions, the reverse static single assignment graph comprising strongly connected components, each of the strongly connected components associated with at least one of the one or more pick/switch instruction pairs. Embodiments also include traversing the reverse static single assignment graph depth-first, and replace pick/switch instructions associated with strongly connected components having configuration values with compound instructions.

公开(公告)号：US10346144B2

公开(公告)日：2019-07-09

申请号：US15721454

申请日：2017-09-29

申请人： Intel Corporation

发明人： Yongzhi Zhang ,  Kent D. Glossop

IPC分类号： G06F9/44 ,  G06F8/41 ,  G06F15/82

摘要： Methods, apparatus, systems and articles of manufacture to map a set of instructions onto a data flow graph are disclosed herein. An example apparatus includes a variable handler to modify a variable in the set of instructions. The variable is used multiple times in the set of instructions and the set of instructions are in a static single assignment form. The apparatus also includes a PHI handler to replace a PHI instruction contained in the set of instructions with a set of control data flow instructions and a data flow graph generator to map the set of instructions modified by the variable handler and the PHI handler onto a data flow graph without transforming the instructions out of the static single assignment form.

公开(公告)号：US10318259B2

公开(公告)日：2019-06-11

申请号：US15609583

申请日：2017-05-31

申请人： Intel Corporation

发明人： Yongzhi Zhang

IPC分类号： G06F8/41 ,  G06F8/20 ,  G06F8/34 ,  G06F15/82

摘要： An apparatus for automatically converting a control flow program into a data flow program comprises a non-transitory machine-readable medium and a translator stored in the machine-readable medium. The translator, when executed by a data processing system, enables the data processing system to (a) automatically generate a control dependency graph for a control flow program, (b) automatically generate a data flow graph based at least in part on the control dependency graph, and (c) automatically generate a data flow program based at least in part on the data flow graph. In one embodiment or scenario, the translator may also automatically insert a switch instruction into the data flow program, in response to a determination that a variable of the control flow program is defined in one control dependency region and used in a different control dependency region. Other embodiments are described and claimed.

公开(公告)号：US20190042218A1

公开(公告)日：2019-02-07

申请号：US16017000

申请日：2018-06-25

申请人： INTEL CORPORATION

发明人： Yongzhi Zhang

IPC分类号： G06F8/41 ,  G06F8/30

摘要： Embodiments are directed to techniques to determine dataflow graph instructions comprising one or more pick/switch instruction pairs and generate a reverse static single assignment graph based on the dataflow graph instructions, the reverse static single assignment graph comprising strongly connected components, each of the strongly connected components associated with at least one of the one or more pick/switch instruction pairs. Embodiments also include traversing the reverse static single assignment graph depth-first, and replace pick/switch instructions associated with strongly connected components having configuration values with compound instructions.