公开(公告)号：US12271329B2

公开(公告)日：2025-04-08

申请号：US18250325

申请日：2020-11-24

Applicant: Intel Corporation

Inventor： Zhuangzhi Li ,  Jie Bai ,  Di Zhang ,  Changcheng Liu ,  Zhonghua Sun

IPC: G06F13/40 ,  G06F13/16 ,  G06F13/42

Abstract: Systems, apparatuses and methods may provide for technology that collects, by a BIOS (basic input output system), memory information from a first host path to a coherent device memory on a memory expander, wherein the memory expander includes a plurality of host paths, transfers the memory information from the BIOS to an OS (operating system) via one or more OS interface tables, and initializes, by the OS, the memory expander based on the memory information, wherein the memory information includes memory capabilities and configuration settings associated with the memory expander.

公开(公告)号：US20230379682A1

公开(公告)日：2023-11-23

申请号：US18366808

申请日：2023-08-08

Applicant: Intel Corporation

Inventor： Tingjie Chen ,  Zhonghua Sun ,  Jing Zhao ,  Jing Li ,  Shaohe Feng ,  Yi Sun ,  Cong Zhang

IPC: H04W8/00 ,  H04W72/56

CPC classification number: H04W8/00 ,  H04W72/56 ,  H04W88/18

Abstract: A network processing device is connected to a host processor device and receives radio access network data on a network describing attributes of the radio access network (RAN). The network processing device further includes a classification engine to determine a priority level for the RAN data and identify a block of memory of the host processor device for the RAN data associated with the priority level. The classification engine generates a cache line in cache of the network processing device to store the RAN data, where the cache line is associated with the block of memory. The network processing device causes the cache line to be flushed to the block of memory with the RAN data based on the priority level.

公开(公告)号：US20230385220A1

公开(公告)日：2023-11-30

申请号：US18250325

申请日：2020-11-24

Applicant: Intel Corporation

Inventor： Zhuangzhi Li ,  Jie Bai ,  Di Zhang ,  Changcheng Liu ,  Zhonghua Sun

IPC: G06F13/40 ,  G06F13/16 ,  G06F13/42

CPC classification number: G06F13/4022 ,  G06F13/4081 ,  G06F13/1663 ,  G06F13/4221

Abstract: Systems, apparatuses and methods may provide for technology that collects, by a BIOS (basic input output system), memory information from a first host path to a coherent device memory on a memory expander, wherein the memory expander includes a plurality of host paths, transfers the memory information from the BIOS to an OS (operating system) via one or more OS interface tables, and initializes, by the OS, the memory expander based on the memory information, wherein the memory information includes memory capabilities and configuration settings associated with the memory expander.