公开(公告)号：US10998915B2

公开(公告)日：2021-05-04

申请号：US16321484

申请日：2016-09-02

Applicant: INTEL IP CORPORATION

Inventor： Jose Pedro Diogo Faisca Moreira ,  Joerg Fuhrmann ,  Patrick Ossmann ,  Harald Pretl

IPC: H03M1/66 ,  H03M1/74 ,  H04B1/04

Abstract: A digital-to-analog converter circuit including one or more digital-to-analog converter cells and a separate voltage protection circuit connected by a common output node. A first digital-to-analog converter cell includes a first transistor which is configured to be switched to a conductive state when the first digital-to-analog converter cell is activated. A first terminal of the first transistor is coupled to a defined potential, wherein a second terminal of the first transistor is coupled to a common output node of the one or more digital-to-analog converter cells. The digital-to-analog converter circuit further includes a voltage protection circuit coupled between the common output node of the one or more digital-to-analog converter cells and an output node of the digital-to-analog converter circuit to regulate a voltage between the common output node and the defined potential.

公开(公告)号：US20200343903A1

公开(公告)日：2020-10-29

申请号：US16321484

申请日：2016-09-02

Applicant: INTEL IP CORPORATION

Inventor： Jose Pedro Diogo Faisca MOREIRA ,  Joerg FUHRMANN ,  Patrick OSSMANN ,  Harald Pretl

IPC: H03M1/74 ,  H04B1/04

Abstract: A digital-to-analog converter circuit is provided. The digital-to-analog converter circuit includes one or more digital-to-analog converter cells. A first digital-to-analog converter cell includes a first transistor which is configured to be switched to a conductive state when the first digital-to-analog converter cell is activated. A first terminal of the first transistor is coupled to a defined potential, wherein a second terminal of the first transistor is coupled to a common output node of the one or more digital-to-analog converter cells. The digital-to-analog converter circuit further includes a voltage protection circuit coupled between the common output node of the one or more digital-to-analog converter cells and an output node of the digital-to-analog converter circuit to regulate a voltage between the common output node and the defined potential.

公开(公告)号：US09484854B2

公开(公告)日：2016-11-01

申请号：US14580952

申请日：2014-12-23

Applicant: Intel IP Corporation

Inventor： Harald Pretl ,  Guenther Haberpeuntner ,  Volker Neubauer ,  Svetozar Broussev ,  Andreas Mayer ,  Andreas Puerstinger

IPC: H03L7/00 ,  H03B1/00 ,  H03L7/23 ,  H03L7/18 ,  H03L7/099 ,  H03L7/04 ,  H03L7/07 ,  G06F1/02 ,  H04B1/40

CPC classification number: H03B1/00 ,  G06F1/022 ,  G06F1/08 ,  H03L7/04 ,  H03L7/07 ,  H03L7/099 ,  H03L7/18 ,  H03L7/23 ,  H04B1/40

Abstract: An apparatus for providing oscillator signals includes an oscillator circuit configured to generate a first oscillator signal with a first oscillator signal frequency for a frequency conversion of a first signal to be converted and to generate a second oscillator signal with a second oscillator signal frequency for a frequency conversion of a second signal to be converted. The oscillator circuit is configured to enable the generation of the first oscillator signal with the first oscillator signal frequency and the second oscillator signal with the second oscillator signal frequency based on at least two different possible oscillator circuit configurations. The control circuit is configured to select, based on the first oscillator signal frequency and the second oscillator signal frequency, one of the possible oscillator circuit configurations of the oscillator circuit for generating the first oscillator signal and the second oscillator signal.

Abstract translation: 一种用于提供振荡器信号的装置包括：振荡器电路，被配置为产生具有第一振荡器信号频率的第一振荡器信号，用于对待转换的第一信号进行频率转换，并产生具有用于频率的第二振荡器信号频率的第二振荡器信号 要转换的第二信号的转换。 振荡器电路被配置为能够基于至少两个不同的可能的振荡器电路配置，利用第一振荡器信号频率和第二振荡器信号产生具有第二振荡器信号频率的第一振荡器信号。 控制电路被配置为基于第一振荡器信号频率和第二振荡器信号频率来选择用于产生第一振荡器信号和第二振荡器信号的振荡器电路的可能的振荡器电路配置之一。