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1.发明授权公开(公告)号：US10587349B2
公开(公告)日：2020-03-10
申请号：US15474243
申请日：2017-03-30
Applicant: Intel IP Corporation
Inventor： Ram Sunil Kanumalli , Andreas Mayer , Ahmed Elmaghraby , Mario Huemer , Burkhard Neurauter
Abstract: A transceiver that implements a frequency domain cancellation of a transmit (Tx)-modulated spur associated with a transceiver is disclosed. The transceiver comprises a baseband receive (Rx) path configured to propagate a receive signal in frequency domain, associated with an Rx signal path of the transceiver, forming a baseband Rx signal, wherein the baseband Rx signal comprises a wanted Rx signal and an unwanted transmit (Tx) modulated spur. The transceiver further comprises a baseband Tx path configured to propagate a Tx signal in frequency domain, associated with the Tx signal path of the transceiver, thereby forming a baseband Tx signal. In addition, the transceiver comprises a cancellation circuit coupled to the baseband Rx path, configured to receive the baseband Rx signal and the baseband Tx signal, and generate a cancellation signal based thereon, in order to cancel the unwanted Tx modulated spur from the baseband Rx signal.
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2.发明授权公开(公告)号：US10230421B2
公开(公告)日：2019-03-12
申请号：US15575867
申请日：2016-06-08
Applicant: Intel IP Corporation
Inventor： Ram Kanumalli , Andreas Mayer , Werner Schelmbauer , Ahmed S. Elmaghraby , Burkhard Neurauter
Abstract: A method for reducing a distortion component within a baseband receive signal is provided. The baseband receive signal is derived from a radio frequency signal and the distortion component is related to an undesired signal component of the radio frequency signal. The method includes generating a first local oscillator signal having a frequency related to a frequency of the undesired signal component. Further the method includes generating an auxiliary baseband signal using the radio frequency signal and the first local oscillator signal. The method further includes generating a second local oscillator signal having a frequency related to a frequency of a desired signal component of the radio frequency signal. Further the method includes generating the baseband receive signal using the radio frequency signal and the second local oscillator signal. The method includes modifying the baseband receive signal based on the auxiliary baseband signal.
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3.发明申请公开(公告)号：US20180287719A1
公开(公告)日：2018-10-04
申请号：US15474243
申请日：2017-03-30
Applicant: Intel IP Corporation
Inventor： Ram Sunil Kanumalli , Andreas Mayer , Ahmed Elmaghraby , Mario Huemer , Burkhard Neurauter
Abstract: A transceiver that implements a frequency domain cancellation of a transmit (Tx)-modulated spur associated with a transceiver is disclosed. The transceiver comprises a baseband receive (Rx) path configured to propagate a receive signal in frequency domain, associated with an Rx signal path of the transceiver, forming a baseband Rx signal, wherein the baseband Rx signal comprises a wanted Rx signal and an unwanted transmit (Tx) modulated spur. The transceiver further comprises a baseband Tx path configured to propagate a Tx signal in frequency domain, associated with the Tx signal path of the transceiver, thereby forming a baseband Tx signal. In addition, the transceiver comprises a cancellation circuit coupled to the baseband Rx path, configured to receive the baseband Rx signal and the baseband Tx signal, and generate a cancellation signal based thereon, in order to cancel the unwanted Tx modulated spur from the baseband Rx signal.
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Patent Agency Ranking
公开(公告)号：US09484854B2
公开(公告)日：2016-11-01
申请号：US14580952
申请日：2014-12-23
Applicant: Intel IP Corporation
Inventor： Harald Pretl , Guenther Haberpeuntner , Volker Neubauer , Svetozar Broussev , Andreas Mayer , Andreas Puerstinger
IPC: H03L7/00 , H03B1/00 , H03L7/23 , H03L7/18 , H03L7/099 , H03L7/04 , H03L7/07 , G06F1/02 , H04B1/40
CPC classification number: H03B1/00 , G06F1/022 , G06F1/08 , H03L7/04 , H03L7/07 , H03L7/099 , H03L7/18 , H03L7/23 , H04B1/40
Abstract: An apparatus for providing oscillator signals includes an oscillator circuit configured to generate a first oscillator signal with a first oscillator signal frequency for a frequency conversion of a first signal to be converted and to generate a second oscillator signal with a second oscillator signal frequency for a frequency conversion of a second signal to be converted. The oscillator circuit is configured to enable the generation of the first oscillator signal with the first oscillator signal frequency and the second oscillator signal with the second oscillator signal frequency based on at least two different possible oscillator circuit configurations. The control circuit is configured to select, based on the first oscillator signal frequency and the second oscillator signal frequency, one of the possible oscillator circuit configurations of the oscillator circuit for generating the first oscillator signal and the second oscillator signal.
Abstract translation: 一种用于提供振荡器信号的装置包括：振荡器电路，被配置为产生具有第一振荡器信号频率的第一振荡器信号，用于对待转换的第一信号进行频率转换，并产生具有用于频率的第二振荡器信号频率的第二振荡器信号 要转换的第二信号的转换。 振荡器电路被配置为能够基于至少两个不同的可能的振荡器电路配置，利用第一振荡器信号频率和第二振荡器信号产生具有第二振荡器信号频率的第一振荡器信号。 控制电路被配置为基于第一振荡器信号频率和第二振荡器信号频率来选择用于产生第一振荡器信号和第二振荡器信号的振荡器电路的可能的振荡器电路配置之一。
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公开(公告)号：US09413402B1
公开(公告)日：2016-08-09
申请号：US14750640
申请日：2015-06-25
Applicant: Intel IP Corporation
Inventor： Andreas Mayer , Ram Sunil Kanumalli
CPC classification number: H04B1/12 , H03D1/04 , H04B1/0007 , H04B1/0017 , H04B1/28 , H04L27/3863
Abstract: A low IF receiver for operation at an intermediate frequency (IF), comprises an antenna port configured to receive a receive signal comprising a wanted RF signal at an RF frequency and a blocker RF signal at a mirror image frequency of the wanted RF signal with respect to a frequency of an local oscillator (LO) signal, from an antenna. Further, the low IF receiver comprises a first mixer component configured to down convert the wanted RF signal and the blocker RF signal to an intermediate frequency (IF) signal, based on the frequency of the LO signal, wherein the IF signal comprises a wanted IF signal at a first intermediate frequency and a blocker IF signal at a second intermediate frequency and a second mixer component configured to receive the IF signal, separate the IF signal into the wanted IF signal and the blocker IF signal, and provide the wanted IF signal at a first output thereof and the blocker IF signal at a second output thereof, based on a tuning signal. In addition, the low IF receiver comprises a power estimation component configured to receive the blocker IF signal, measure a power of the blocker IF signal and select the frequency of the LO signal to be applied to the first mixer component from a plurality of LO frequencies, based on the measured power of the blocker IF signal.
Abstract translation: 用于在中频（IF）下操作的低IF接收机包括：天线端口，被配置为接收包含RF频率的有用RF信号的接收信号，以及所需RF信号的镜像频率处的阻塞RF信号， 从天线到本地振荡器（LO）信号的频率。 此外，低IF接收机包括第一混频器部件，其被配置为基于LO信号的频率将所需的RF信号和阻断器RF信号下变频到中频（IF）信号，其中IF信号包括有用的IF 在第一中频处的信号和在第二中频处的阻塞IF信号和被配置为接收IF信号的第二混频器分量，将IF信号分离成有用的IF信号和阻塞IF信号，并将所需的IF信号提供在 其第一输出和其第二输出端的阻塞IF信号，基于调谐信号。 另外，低IF接收机包括被配置为接收阻塞器IF信号的功率估计部件，测量阻塞器IF信号的功率，并从多个LO频率中选择要施加到第一混频器部件的LO信号的频率 ，基于阻塞IF信号的测量功率。
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公开(公告)号：US20160087639A1
公开(公告)日：2016-03-24
申请号：US14494718
申请日：2014-09-24
Applicant: Intel IP Corporation
Inventor： Christian Wicpalek , Thomas Mayer , Andreas Mayer , Thorsten Tracht
CPC classification number: H03L7/085 , G04F10/005 , H03L7/1976
Abstract: A phase locked loop includes a feedforward path receiving a reference signal having a reference frequency and outputting an output signal having an output frequency that is a function of the reference signal and a feedback signal. The phase locked loop further includes a feedback path having a divider circuit associated therewith that is configured to receive the output signal and generate the feedback signal having a reduced frequency based on a divide value of the divider circuit. The feedback signal is supplied to the feedforward path. The phase locked loop also includes a modulator circuit configured to receive modulation data and provide a divider control signal to the divider circuit to control the divide value thereof, and a phase tracker circuit configured to determine an amount of phase drift from an initial phase value of the output signal due to an interruption in a locked state of the phase locked loop.
Abstract translation: 锁相环包括接收具有参考频率的参考信号的前馈路径，并输出具有作为参考信号和反馈信号的函数的输出频率的输出信号。 锁相环还包括具有与其相关联的分频器电路的反馈路径，其被配置为接收输出信号并且基于分频器电路的除法产生具有降低的频率的反馈信号。 反馈信号被提供给前馈路径。 锁相环还包括配置成接收调制数据并将分频器控制信号提供给分频器电路以控制其分频值的调制器电路，以及相位跟踪器电路，被配置为从相位漂移的初始相位值 该输出信号由于锁相环中的锁定状态而中断。
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7.发明申请公开(公告)号：US20180159585A1
公开(公告)日：2018-06-07
申请号：US15575867
申请日：2016-06-08
Applicant: Intel IP Corporation
Inventor： Ram Kanumalli , Andreas Mayer , Werner Schelmbauer , Ahmed S. Elmaghraby , Burkhard Neurauter
CPC classification number: H04B1/525 , H04B1/1027 , H04B2001/0408 , H04L25/02 , H04L27/12
Abstract: A method for reducing a distortion component within a baseband receive signal is provided. The baseband receive signal is derived from a radio frequency signal and the distortion component is related to an undesired signal component of the radio frequency signal. The method includes generating a first local oscillator signal having a frequency related to a frequency of the undesired signal component. Further the method includes generating an auxiliary baseband signal using the radio frequency signal and the first local oscillator signal. The method further includes generating a second local oscillator signal having a frequency related to a frequency of a desired signal component of the radio frequency signal. Further the method includes generating the baseband receive signal using the radio frequency signal and the second local oscillator signal. The method includes modifying the baseband receive signal based on the auxiliary baseband signal.
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公开(公告)号：US09584139B2
公开(公告)日：2017-02-28
申请号：US14494718
申请日：2014-09-24
Applicant: Intel IP Corporation
Inventor： Christian Wicpalek , Thomas Mayer , Andreas Mayer , Thorsten Tracht
CPC classification number: H03L7/085 , G04F10/005 , H03L7/1976
Abstract: A phase locked loop includes a feedforward path receiving a reference signal having a reference frequency and outputting an output signal having an output frequency that is a function of the reference signal and a feedback signal. The phase locked loop further includes a feedback path having a divider circuit associated therewith that is configured to receive the output signal and generate the feedback signal having a reduced frequency based on a divide value of the divider circuit. The feedback signal is supplied to the feedforward path. The phase locked loop also includes a modulator circuit configured to receive modulation data and provide a divider control signal to the divider circuit to control the divide value thereof, and a phase tracker circuit configured to determine an amount of phase drift from an initial phase value of the output signal due to an interruption in a locked state of the phase locked loop.
Abstract translation: 锁相环包括接收具有参考频率的参考信号的前馈路径，并输出具有作为参考信号和反馈信号的函数的输出频率的输出信号。 锁相环还包括具有与其相关联的分频器电路的反馈路径，其被配置为接收输出信号并且基于分频器电路的除法产生具有降低的频率的反馈信号。 反馈信号被提供给前馈路径。 锁相环还包括配置成接收调制数据并将分频器控制信号提供给分频器电路以控制其分频值的调制器电路，以及相位跟踪器电路，被配置为从相位漂移的初始相位值 该输出信号由于锁相环中的锁定状态而中断。
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