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公开(公告)号：US10768580B2
公开(公告)日：2020-09-08
申请号：US16474562
申请日：2017-03-02
Applicant: Intel IP Corporation
Inventor： Yair Dgani , Michael Kerner , Elan Banin , Evgeny Shumaker , Gil Horovitz , Ofir Degani , Rotem Banin , Aryeh Farber , Rotem Avivi , Eshel Gordon , Tami Sela
Abstract: A time-to-digital converter is provided. The time-to-digital converter includes a delay circuit configured to iteratively delay a reference signal for generating a plurality of delayed reference signals. Further, the time-to-digital converter includes a plurality of sample circuits each configured to sample an oscillation signal based on one of the plurality of delayed reference signals. The time-to-digital converter additionally includes a control circuit configured to de-activate at least one of the plurality of sample circuits based on a predicted value of the phase of the oscillation signal.
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公开(公告)号：US20190384230A1
公开(公告)日：2019-12-19
申请号：US16474562
申请日：2017-03-02
Applicant: Intel IP Corporation
Inventor： Yair Dgani , Michael Kerner , Elan Banin , Evgeny Shumaker , Gil Horovitz , Ofir Degani , Rotem Banin , Aryeh Farber , Rotem Avivi , Eshel Gordon , Tami Sela
Abstract: A time-to-digital converter is provided. The time-to-digital converter includes a delay circuit configured to iteratively delay a reference signal for generating a plurality of delayed reference signals. Further, the time-to-digital converter includes a plurality of sample circuits each configured to sample an oscillation signal based on one of the plurality of delayed reference signals. The time-to-digital converter additionally includes a control circuit configured to de-activate at least one of the plurality of sample circuits based on a predicted value of the phase of the oscillation signal.
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