公开(公告)号：US20200294969A1

公开(公告)日：2020-09-17

申请号：US16355623

申请日：2019-03-15

Applicant: Intel Corporation

Inventor： Willy Rachmady ,  Cheng-Ying Huang ,  Ehren Mannebach ,  Anh Phan ,  Caleb Shuan Chia Barrett ,  Jay Prakash Gupta ,  Nishant Gupta ,  Kaiwen Hsu ,  Byungki Jung ,  Srinivasa Aravind Killampalli ,  Justin Gary Railsback ,  Supanee Sukrittanon ,  Prashant Wadhwa

IPC: H01L25/065 ,  H01L27/085 ,  H01L29/78 ,  H01L21/84 ,  H01L27/06

Abstract: Disclosed herein are stacked transistors with dielectric between source/drain materials of different strata, as well as related methods and devices. In some embodiments, an integrated circuit structure may include stacked strata of transistors, wherein a dielectric material is between source/drain materials of adjacent strata, and the dielectric material is conformal on underlying source/drain material.

公开(公告)号：US20240355876A1

公开(公告)日：2024-10-24

申请号：US18303932

申请日：2023-04-20

Applicant: Intel corporation

Inventor： Siddharth Gupta ,  Robin Chao ,  Jay Prakash Gupta ,  Aravind Killampalli ,  Biswajeet Guha

IPC: H01L29/06 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/423

CPC classification number: H01L29/0665 ,  H01L21/823807 ,  H01L27/0922 ,  H01L29/42364

Abstract: Described herein are nanoribbon-based transistors with a highly uniform oxide layer around semiconductor nanoribbon channels, and a high-pressure steam process for growth the oxide layer. The high-pressure steam process is a self-limiting process that results in a more uniform oxide than standard deposition or implantation methods. The uniformity enables greater control over oxide thickness, with improved breakdown voltages and drive currents.

公开(公告)号：US20230299040A1

公开(公告)日：2023-09-21

申请号：US17699024

申请日：2022-03-18

Applicant: Intel Corporation

Inventor： Jay Prakash Gupta ,  Souvik Ghosh ,  Kimin Jun ,  Bhupendra Kumar ,  Shashi Vyas ,  Anup Pancholi

IPC: H01L23/00

CPC classification number: H01L24/80 ,  H01L24/03 ,  H01L24/08 ,  H01L24/05 ,  H01L2224/0345 ,  H01L2224/03849 ,  H01L2224/08147 ,  H01L2224/05687 ,  H01L2224/05147 ,  H01L2224/05666 ,  H01L2224/05187 ,  H01L2224/8009 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80203 ,  H01L2224/8083 ,  H01L2224/80948 ,  H01L2924/35121

Abstract: A microelectronic assembly and a method of forming same. The assembly includes: first and second microelectronic structures; and an interface layer between the two microelectronic structures including dielectric portions in registration with dielectric layers of each of the microelectronic structures, and electrically conductive portions in registration with electrically conductive structures of each of the microelectronic structures, wherein the dielectric portions include an oxide of a metal, and the electrically conductive portions include the metal.