Block mask litho on high aspect ratio topography with minimal semiconductor material damage
    1.
    发明授权
    Block mask litho on high aspect ratio topography with minimal semiconductor material damage 有权
    在高纵横比地形上具有最小半导体材料损伤的掩模光刻

    公开(公告)号:US09425053B2

    公开(公告)日:2016-08-23

    申请号:US14317003

    申请日:2014-06-27

    Abstract: A trilayer stack that can be used as a block mask for forming patterning features in semiconductor structures with high aspect ratio topography is provided. The trilayer stack includes an organic planarization (OPL) layer, a titanium-containing antireflective coating (TiARC) layer on the OPL layer and a photoresist layer on the TiARC layer. Employing a combination of an OPL having a high etch rate and a TiARC layer that can be easily removed by a mild chemical etchant solution in the trilayer stack can significantly minimize substrate damage during lithographic patterning processes.

    Abstract translation: 提供了可以用作用于在具有高纵横比拓扑的半导体结构中形成图案特征的块掩模的三层叠层。 三层堆叠包括有机平面化(OPL)层,OPL层上的含钛抗反射涂层(TiARC)层和TiARC层上的光刻胶层。 采用具有高蚀刻速率的OPL和可以通过三层叠层中的温和化学蚀刻剂溶液容易除去的TiARC层的组合可以显着地最小化平版印刷图案化过程中的底材损伤。

    Deep well implant using blocking mask
    2.
    发明授权
    Deep well implant using blocking mask 有权
    使用阻挡面膜深植入

    公开(公告)号:US09431250B2

    公开(公告)日:2016-08-30

    申请号:US14199282

    申请日:2014-03-06

    CPC classification number: H01L21/266

    Abstract: Various methods include: forming an opening in a resist layer to expose a portion of an underlying blocking layer; performing an etch on the exposed portion of the blocking layer to expose a portion of an etch stop layer, wherein the etch stop layer resists etching during the etch of the exposed portion of the blocking layer; etching the exposed portion of the etch stop layer to expose a portion of a substrate below the exposed portion of the etch stop layer and leave a remaining portion of the etch stop layer; and ion implanting the exposed portion of the substrate, wherein the blocking layer prevents ion implanting of the substrate outside of the exposed portion.

    Abstract translation: 各种方法包括:在抗蚀剂层中形成开口以暴露下面的阻挡层的一部分; 在所述阻挡层的暴露部分上进行蚀刻以暴露蚀刻停止层的一部分,其中所述蚀刻停止层在所述阻挡层的暴露部分的蚀刻期间抵抗蚀刻; 蚀刻蚀刻停止层的暴露部分以暴露蚀刻停止层的暴露部分下方的衬底的一部分并留下蚀刻停止层的剩余部分; 以及离子注入衬底的暴露部分,其中阻挡层防止衬底离开暴露部分外部的离子注入。

    DSA grapho-epitaxy process with etch stop material
    3.
    发明授权
    DSA grapho-epitaxy process with etch stop material 有权
    具有蚀刻停止材料的DSA图案沉积工艺

    公开(公告)号:US08859433B2

    公开(公告)日:2014-10-14

    申请号:US13793739

    申请日:2013-03-11

    CPC classification number: H01L21/0337 H01L21/0271

    Abstract: A method for defining a template for directed self-assembly (DSA) materials includes forming an etch stop layer on a neutral material, forming a mask layer on the etch stop layer and forming an anti-reflection coating (ARC) on the mask layer. A resist layer is patterned on the ARC using optical lithography to form a template pattern. The ARC and the mask layer are reactive ion etched down to the etch stop layer in accordance with the template pattern to form a template structure. The ARC is removed from the mask layer and the template structure is trimmed to reduce a width of the template structure. A wet etch is performed to remove the etch stop layer to permit the neutral material to form an undamaged DSA template for DSA materials.

    Abstract translation: 用于定义用于定向自组装(DSA)材料的模板的方法包括在中性材料上形成蚀刻停止层,在蚀刻停止层上形成掩模层,并在掩模层上形成防反射涂层(ARC)。 使用光刻法在ARC上形成抗蚀剂层以形成模板图案。 ARC和掩模层根据模板图案被反应离子蚀刻到蚀刻停止层以形成模板结构。 从掩模层移除ARC,并修剪模板结构以减小模板结构的宽度。 执行湿蚀刻以去除蚀刻停止层,以允许中性材料形成用于DSA材料的未损坏的DSA模板。

    BLOCK MASK LITHO ON HIGH ASPECT RATIO TOPOGRAPHY WITH MINIMAL SEMICONDUCTOR MATERIAL DAMAGE
    4.
    发明申请
    BLOCK MASK LITHO ON HIGH ASPECT RATIO TOPOGRAPHY WITH MINIMAL SEMICONDUCTOR MATERIAL DAMAGE 有权
    具有最小半导体材料损伤的高倍率地形图上的块状掩模

    公开(公告)号:US20150380251A1

    公开(公告)日:2015-12-31

    申请号:US14317003

    申请日:2014-06-27

    Abstract: A trilayer stack that can be used as a block mask for forming patterning features in semiconductor structures with high aspect ratio topography is provided. The trilayer stack includes an organic planarization (OPL) layer, a titanium-containing antireflective coating (TiARC) layer on the OPL layer and a photoresist layer on the TiARC layer. Employing a combination of an OPL having a high etch rate and a TiARC layer that can be easily removed by a mild chemical etchant solution in the trilayer stack can significantly minimize substrate damage during lithographic patterning processes.

    Abstract translation: 提供了可以用作用于在具有高纵横比拓扑的半导体结构中形成图案特征的块掩模的三层叠层。 三层堆叠包括有机平面化(OPL)层,OPL层上的含钛抗反射涂层(TiARC)层和TiARC层上的光刻胶层。 采用具有高蚀刻速率的OPL和可以通过三层叠层中的温和化学蚀刻剂溶液容易除去的TiARC层的组合可以显着地最小化平版印刷图案化过程中的底材损伤。

    DEEP WELL IMPLANT USING BLOCKING MASK
    5.
    发明申请
    DEEP WELL IMPLANT USING BLOCKING MASK 有权
    深埋植物使用阻塞​​面膜

    公开(公告)号:US20150255286A1

    公开(公告)日:2015-09-10

    申请号:US14199282

    申请日:2014-03-06

    CPC classification number: H01L21/266

    Abstract: Various methods include: forming an opening in a resist layer to expose a portion of an underlying blocking layer; performing an etch on the exposed portion of the blocking layer to expose a portion of an etch stop layer, wherein the etch stop layer resists etching during the etch of the exposed portion of the blocking layer; etching the exposed portion of the etch stop layer to expose a portion of a substrate below the exposed portion of the etch stop layer and leave a remaining portion of the etch stop layer; and ion implanting the exposed portion of the substrate, wherein the blocking layer prevents ion implanting of the substrate outside of the exposed portion.

    Abstract translation: 各种方法包括:在抗蚀剂层中形成开口以暴露下面的阻挡层的一部分; 在所述阻挡层的暴露部分上进行蚀刻以暴露蚀刻停止层的一部分,其中所述蚀刻停止层在所述阻挡层的暴露部分的蚀刻期间抵抗蚀刻; 蚀刻蚀刻停止层的暴露部分以暴露蚀刻停止层的暴露部分下方的衬底的一部分并留下蚀刻停止层的剩余部分; 以及离子注入衬底的暴露部分,其中阻挡层防止衬底离开暴露部分外部的离子注入。

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