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公开(公告)号：US20180292878A1
公开(公告)日：2018-10-11
申请号：US15480963
申请日：2017-04-06
发明人： Nathaniel R. Chadwick , Bjorn P. Christensen , James M. Crafts , Allen R Hall , Kevin F. Reick , Jon Robert Tetzloff
IPC分类号： G06F1/32
CPC分类号： G06F1/324 , G06F1/24 , G06F1/3243 , G06F1/3296
摘要： A processor can have a plurality of cores. A first core processor of a first core can read one or more values of a default parameter set. The first core can be operated in accordance with a first operating characteristic based, at least in part, on the one or more values of the default parameter set. The first core processor can receive an indication to change the operating characteristic of the first core processor. In response to receiving the indication to change the operating characteristic, a signal can be issued to the first core processor to reset. In response to the reset, the first core processor can read one or more values of an alternative parameter set. The first core processor can then be operated in accordance with a second operating characteristic based, at least in part, on the one or more values of the alternative parameter set.
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公开(公告)号：US20140184262A1
公开(公告)日：2014-07-03
申请号：US13732482
申请日：2013-01-02
发明人： Daniel J. Poindexter , James M. Crafts , Karre M. Greene , Kenneth A. Lavallee , Keith C. Stevens
IPC分类号： G01R31/28
CPC分类号： G01R31/2853 , G01R31/30 , H01L21/00 , H01L24/00 , H01M2200/00
摘要： System and method using low voltage current measurements to measure voltage network currents in an integrated circuit (IC). In one aspect, a low voltage current leakage test is applied voltage networks for the IC or microchip via one or more IC chip connectors. One or multiple specifications are developed based on chip's circuit delay wherein a chip is aborted or sorted into a lesser reliability sort depending whether the chip fails specification. Alternately, a low voltage current leakage test begins an integrated circuit test flow. Then there is run a high voltage stress, and a second low voltage current leakage test is thereafter added. Then, there is compared the second low voltage test to the first low V test, and if the measured current is less on second test, this is indicative of a defect present which may result in either a scrap or downgrade reliability of chip.
摘要翻译： 使用低电压电流测量的系统和方法来测量集成电路（IC）中的电压网络电流。 一方面，通过一个或多个IC芯片连接器对IC或微芯片施加低电压电流泄漏测试。 基于芯片的电路延迟开发一个或多个规范，其中芯片被中止或者根据芯片的规格是否失败，将其分类为较小的可靠性排序。 或者，低压电流泄漏测试开始集成电路测试流程。 然后施加高电压应力，然后再加入第二次低压漏电试验。 然后，将第二个低电压测试与第一个低V测试进行比较，如果在第二次测试中测量的电流较小，则表明存在可能导致芯片的碎片或降级可靠性的缺陷。
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公开(公告)号：US11422611B2
公开(公告)日：2022-08-23
申请号：US16678825
申请日：2019-11-08
发明人： Nathaniel R. Chadwick , Bjorn P. Christensen , James M. Crafts , Allen R. Hall , Kevin F. Reick , Jon Robert Tetzloff
IPC分类号： G06F1/00 , G06F1/324 , G06F1/3296 , G06F1/3234 , G06F1/24
摘要： A method for facilitating adaptive frequency in a processor having a plurality of cores. The method can include conducting tests on the processor; determining, via the processor testing system, default parameters for operating one or more of the cores, wherein the default parameters are based on results of the tests and cause one or more of the cores to operate within production yield goals of the processor; determining alternative parameters for operating one or more of the cores, wherein the alternative parameters are based on results of the test and cause one or more of the cores to operate outside production yield goals of the processor, and wherein the alternative parameters are usable to reconfigure one or more of the cores after an initial operation per the default parameters; and writing the default parameters and the alternative parameters to a production data storage of the processor.
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公开(公告)号：US20200073459A1
公开(公告)日：2020-03-05
申请号：US16678825
申请日：2019-11-08
发明人： Nathaniel R. Chadwick , Bjorn P. Christensen , James M. Crafts , Allen R. Hall , Kevin F. Reick , Jon Robert Tetzloff
IPC分类号： G06F1/324 , G06F1/24 , G06F1/3234 , G06F1/3296
摘要： A method for facilitating adaptive frequency in a processor having a plurality of cores. The method can include conducting tests on the processor; determining, via the processor testing system, default parameters for operating one or more of the cores, wherein the default parameters are based on results of the tests and cause one or more of the cores to operate within production yield goals of the processor; determining alternative parameters for operating one or more of the cores, wherein the alternative parameters are based on results of the test and cause one or more of the cores to operate outside production yield goals of the processor, and wherein the alternative parameters are usable to reconfigure one or more of the cores after an initial operation per the default parameters; and writing the default parameters and the alternative parameters to a production data storage of the processor.
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公开(公告)号：US10509457B2
公开(公告)日：2019-12-17
申请号：US15480963
申请日：2017-04-06
发明人： Nathaniel R. Chadwick , Bjorn P. Christensen , James M. Crafts , Allen R. Hall , Kevin F. Reick , Jon Robert Tetzloff
IPC分类号： G06F1/24 , G06F9/00 , G06F1/324 , G06F1/3296 , G06F1/3234
摘要： A processor can have a plurality of cores. A first core processor of a first core can read one or more values of a default parameter set. The first core can be operated in accordance with a first operating characteristic based, at least in part, on the one or more values of the default parameter set. The first core processor can receive an indication to change the operating characteristic of the first core processor. In response to receiving the indication to change the operating characteristic, a signal can be issued to the first core processor to reset. In response to the reset, the first core processor can read one or more values of an alternative parameter set. The first core processor can then be operated in accordance with a second operating characteristic based, at least in part, on the one or more values of the alternative parameter set.
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