公开(公告)号：US20030132453A1

公开(公告)日：2003-07-17

申请号：US10047975

申请日：2002-01-15

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： David R. Greenberg ,  Basanth Jagannathan ,  Shwu-Jen Jeng ,  Joseph T. Kocis ,  Samuel C. Ramac ,  David M. Rockwell

IPC分类号： H01L021/8222 ,  H01L021/331 ,  H01L031/0328

CPC分类号： H01L29/66242 ,  H01L29/7378

摘要： A method of fabricating a SiGe heterojunction bipolar transistor (HBT) is provided which results in a SiGe HBT that has a controllable current gain and improved breakdown voltage. The SiGe HBT having these characteristics is fabricated by forming an in-situ P-doped emitter layer atop a patterned SiGe base structure. The in-situ P-doped emitter layer is a bilayer of in-situ P-doped a:Si and in-situ P-doped polysilicon. The SiGe HBT structure including the above mentioned bilayer emitter is also described herein.

公开(公告)号：US20040063293A1

公开(公告)日：2004-04-01

申请号：US10676171

申请日：2003-10-01

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： David R. Greenberg ,  Basanth Jagannathan ,  Shwu-Jen Jeng ,  Joseph T. Kocis ,  Samuel C. Ramac ,  David M. Rockwell

IPC分类号： H01L021/331 ,  H01L021/8222

CPC分类号： H01L29/66242 ,  H01L29/7378

摘要： A method of fabricating a SiGe heterojunction bipolar transistor (HBT) is provided which results in a SiGe HBT that has a controllable current gain and improved breakdown voltage. The SiGe HBT having these characteristics is fabricated by forming an in-situ P-doped emitter layer atop a patterned SiGe base structure. The in-situ P-doped emitter layer is a bilayer of in-situ P-doped a:Si and in-situ P-doped polysilicon. The SiGe HBT structure including the above mentioned bilayer emitter is also described herein.

公开(公告)号：US20040097003A1

公开(公告)日：2004-05-20

申请号：US10300520

申请日：2002-11-20

申请人： International Business Machines Corporation

发明人： Joseph T. Kocis ,  James Tornello ,  Kevin S. Petrarca ,  Richard Volant ,  Seshadri Subbanna

IPC分类号： H01L021/00 ,  H01L021/44

CPC分类号： B81C1/00666 ,  B81B2201/014 ,  B81C2201/0167 ,  H01F2007/068 ,  H01H50/005

摘要： A method of fabricating an encapsulated micro electro-mechanical system (MEMS) and making of same that includes forming a dielectric layer, patterning an upper surface of the dielectric layer to form a trench, forming a release material within the trench, patterning an upper surface of the release material to form another trench, forming a first encapsulating layer that includes sidewalls within the another trench, forming a core layer within the first encapsulating layer, and forming a second encapsulating layer above the core layer, where the second encapsulating layer is connected to the sidewalls of the first encapsulating layer. Alternatively, the method includes forming a multilayer MEMS structure by photomasking processes to form a first metal layer, a second layer including a dielectric layer and a second metal layer, and a third metal layer. The core layer and the encapsulating layers are made of materials with complementary electrical, mechanical and/or magnetic properties.