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公开(公告)号:US20170192057A1
公开(公告)日:2017-07-06
申请号:US15180281
申请日:2016-06-13
Applicant: International Business Machines Corporation
IPC: G01R31/3177 , G01R31/317
Abstract: Aspects include a method for logic built-in self-testing (LBIST) for use in an integrated circuit with scan chains. The method includes programming a product control generator and a pattern generator with an LBIST pattern comprising at least a number of loops. The LBIST pattern is executed by generating scan-in test values for scan chains with the pattern generator and controlling at least one test parameter with the product control generator. Scan-out responses are collected from the scan chains in a signature register, and a start request is received from a chip tester. The LBIST is started in response to the start request. Test summary data is reported to the chip tester before the whole number of loops has been executed.
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公开(公告)号:US20170254850A1
公开(公告)日:2017-09-07
申请号:US15291269
申请日:2016-10-12
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: WILLIAM V. HUOTT , ANKIT N. KAGLIWAL , MARY P. KUSKO , ROBERT C. REDBURN
IPC: G01R31/3177 , G01R31/317
CPC classification number: G01R31/31721 , G01R31/31704 , G01R31/31723 , G01R31/3177 , G06F17/505 , G06F17/5068
Abstract: Aspects include a computer-implemented method for scan diagnostic logic circuit insertion in a circuit design topology. A method includes evaluating a scan chain of the circuit design topology, the scan chain comprising a plurality of scan latches and a plurality of physical structures, the evaluating including identifying the plurality of physical structures in the scan chain. The method also includes identifying one of the plurality of physical structures as a physical structure of interest, and responsive to the identification of the physical structure of interest, targeting the physical structure of interest, the targeting comprising inserting scan diagnostic logic at a location in the scan chain that is based on a location of the physical structure of interest in the scan chain.
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公开(公告)号:US20180196497A1
公开(公告)日:2018-07-12
申请号:US15404355
申请日:2017-01-12
Applicant: International Business Machines Corporation
Inventor: STEVEN M. DOUSKEY , RAGHU G. GOPALAKRISHNASETTY , MARY P. KUSKO , HARI KRISHNAN RAJEEV , JAMES D. WARNOCK
IPC: G06F1/32
CPC classification number: G06F1/3287 , G06F1/26 , G06F1/3296
Abstract: Operating pulsed latches on a variable power supply including turning on a first power rail powering a first latch of an integrated circuit, wherein the first latch is a pulsed latch; turning on a second power rail powering a second latch of the integrated circuit, wherein the second latch is operatively coupled to the first latch; performing a scan operation using the first latch and the second latch; turning off the first power rail powering the first latch; and performing a functional operation using the second latch, wherein the first power rail powering the first latch is off during the functional operation.
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公开(公告)号:US20170254851A1
公开(公告)日:2017-09-07
申请号:US15057240
申请日:2016-03-01
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: WILLIAM V. HUOTT , ANKIT N. KAGLIWAL , MARY P. KUSKO , ROBERT C. REDBURN
IPC: G01R31/3185 , G06F17/50
CPC classification number: G01R31/31721 , G01R31/31704 , G01R31/31723 , G01R31/3177 , G06F17/505 , G06F17/5068
Abstract: Aspects include a computer-implemented method for scan diagnostic logic circuit insertion in a circuit design topology. A method includes evaluating a scan chain of the circuit design topology, the scan chain comprising a plurality of scan latches and a plurality of physical structures, the evaluating including identifying the plurality of physical structures in the scan chain. The method also includes identifying one of the plurality of physical structures as a physical structure of interest, and responsive to the identification of the physical structure of interest, targeting the physical structure of interest, the targeting comprising inserting scan diagnostic logic at a location in the scan chain that is based on a location of the physical structure of interest in the scan chain.
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公开(公告)号:US20190286221A1
公开(公告)日:2019-09-19
申请号:US16432524
申请日:2019-06-05
Applicant: International Business Machines Corporation
Inventor: STEVEN M. DOUSKEY , Raghu G. Gopalakrishnasetty , MARY P. KUSKO , Hari Krishnan Rajeev , JAMES D. WARNOCK
IPC: G06F1/3287 , G06F1/3296 , G06F1/26
Abstract: Operating pulsed latches on a variable power supply including turning on a first power rail powering a first latch of an integrated circuit, wherein the first latch is a pulsed latch; turning on a second power rail powering a second latch of the integrated circuit, wherein the second latch is operatively coupled to the first latch; performing a scan operation using the first latch and the second latch; turning off the first power rail powering the first latch; and performing a functional operation using the second latch, wherein the first power rail powering the first latch is off during the functional operation.
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