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公开(公告)号：US20190157187A1
公开(公告)日：2019-05-23
申请号：US15816913
申请日：2017-11-17
发明人： Guy Cohen , Christian Lavoie , Ahmet Serkan Ozcan , Paul Solomon
IPC分类号： H01L23/48 , H01L21/48 , H01L21/02 , H01L21/768
摘要： A field-effect transistor (FET) and method of manufacture thereof include a gate, a pillar of grown on a top of the planar source and drain regions, and a conductive sheath flanking the pillar, the sheath is bent up, alongside, and over the gate.
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公开(公告)号：US10079234B1
公开(公告)日：2018-09-18
申请号：US15635709
申请日：2017-06-28
发明人： Effendi Leobandung , Yulong Li , Paul Solomon , Chun-Chen Yeh
IPC分类号： H01L21/00 , H01L27/108
CPC分类号： H01L27/108 , H01L27/10808 , H01L27/10826 , H01L27/10844 , H01L27/10852 , H01L27/10879 , H01L27/1211
摘要： A memory device including a plurality of memory unit cells arranged in a crossbar configuration for a neural network is provided. Each of the memory unit cells includes a readout transistor, a charging transistor, a discharging transistor, and a metal-insulator-metal (MIM) capacitor connected to one of source/drain regions of each of the charging transistor and the discharging transistor and a functional gate of the readout transistor for storing analog information.
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公开(公告)号：US11055610B2
公开(公告)日：2021-07-06
申请号：US15639255
申请日：2017-06-30
发明人： Yulong Li , Paul Solomon , Effendi Leobandung , Chun-Chen Yeh , Seyoung Kim
摘要： A CMOS-based resistive processing unit (RPU) for a neural network. The RPU includes a capacitor device configured to store a charge representing a weight value associated with a neural network circuit operation. A current source Field Effect Transistor (FET) device is operatively connected to the capacitor device for increasing a charge on the capacitor. A current sink FET device operatively connected to the capacitor device is configured for decreasing the stored capacitor charge. An analog weight update circuit receives one or more update signals generated in conjunction with the neural network circuit operation, the analog weight update circuit controlling the current source FET device and the current sink FET device to provide either a determined amount of current to increase the stored charge on the capacitor device, or sink a determined amount of current to decrease the stored charge on the capacitor device.
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公开(公告)号：US20200027820A1
公开(公告)日：2020-01-23
申请号：US16587980
申请日：2019-09-30
发明人： Guy Cohen , Christian Lavoie , Ahmet Serkan Ozcan , Paul Solomon
IPC分类号： H01L23/48 , H01L21/768 , H01L21/02 , H01L21/48
摘要： A field-effect transistor (FET) and method of manufacture thereof include patterning a mask above a source and drain of a FET to form holes in the mask, growing epitaxial structures from the holes in the mask, and growing a doped epitaxial shell to coat sidewalls of the epitaxial structures.
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公开(公告)号：US10541191B2
公开(公告)日：2020-01-21
申请号：US15816913
申请日：2017-11-17
发明人： Guy Cohen , Christian Lavoie , Ahmet Serkan Ozcan , Paul Solomon
IPC分类号： H01L23/48 , H01L21/768 , H01L21/02 , H01L21/48
摘要： A field-effect transistor (FET) and method of manufacture thereof include a gate, a doped semiconductor structure formed on top of the planar source and drain regions, and a sheath of conducting materials flanking the formed doped semiconductor structure, where the sheath is perpendicular to a surface of the planar source and drain regions.
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公开(公告)号：US20190005381A1
公开(公告)日：2019-01-03
申请号：US15639255
申请日：2017-06-30
发明人： Yulong Li , Paul Solomon , Effendi Leobandung , Chun-Chen Yeh , Seyoung Kim
摘要： A CMOS-based resistive processing unit (RPU) for a neural network. The RPU includes a capacitor device configured to store a charge representing a weight value associated with a neural network circuit operation. A current source Field Effect Transistor (FET) device is operatively connected to the capacitor device for increasing a charge on the capacitor. A current sink FET device operatively connected to the capacitor device is configured for decreasing the stored capacitor charge. An analog weight update circuit receives one or more update signals generated in conjunction with the neural network circuit operation, the analog weight update circuit controlling the current source FET device and the current sink FET device to provide either a determined amount of current to increase the stored charge on the capacitor device, or sink a determined amount of current to decrease the stored charge on the capacitor device.
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公开(公告)号：US11055611B2
公开(公告)日：2021-07-06
申请号：US15820114
申请日：2017-11-21
发明人： Yulong Li , Paul Solomon , Effendi Leobandung , Chun-Chen Yeh , Seyoung Kim
摘要： A CMOS-based resistive processing unit (RPU) and method for a neural network. The RPU includes a capacitor device configured to store a charge representing a weight value associated with a neural network circuit operation. A current source Field Effect Transistor (FET) device is operatively connected to the capacitor device for increasing a charge on the capacitor. A current sink FET device operatively connected to the capacitor device is configured for decreasing the stored capacitor charge. An analog weight update circuit receives one or more update signals generated in conjunction with the neural network circuit operation, the analog weight update circuit controlling the current source FET device and the current sink FET device to provide either a determined amount of current to increase the stored charge on the capacitor device, or sink a determined amount of current to decrease the stored charge on the capacitor device.
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公开(公告)号：US10204907B2
公开(公告)日：2019-02-12
申请号：US16056032
申请日：2018-08-06
发明人： Effendi Leobandung , Yulong Li , Paul Solomon , Chun-Chen Yeh
IPC分类号： H01L21/00 , H01L27/108
摘要： A memory device including a plurality of memory unit cells arranged in a crossbar configuration for a neural network is provided. Each of the memory unit cells includes a readout transistor, a charging transistor, a discharging transistor, and a metal-insulator-metal (MIM) capacitor connected to one of source/drain regions of each of the charging transistor and the discharging transistor and a functional gate of the readout transistor for storing analog information.
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公开(公告)号：US20190006366A1
公开(公告)日：2019-01-03
申请号：US16056032
申请日：2018-08-06
发明人： Effendi Leobandung , Yulong Li , Paul Solomon , Chun-Chen Yeh
IPC分类号： H01L27/108
摘要： A memory device including a plurality of memory unit cells arranged in a crossbar configuration for a neural network is provided. Each of the memory unit cells includes a readout transistor, a charging transistor, a discharging transistor, and a metal-insulator-metal (MIM) capacitor connected to one of source/drain regions of each of the charging transistor and the discharging transistor and a functional gate of the readout transistor for storing analog information.
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公开(公告)号：US10707148B2
公开(公告)日：2020-07-07
申请号：US16587980
申请日：2019-09-30
发明人： Guy Cohen , Christian Lavoie , Ahmet Serkan Ozcan , Paul Solomon
IPC分类号： H01L23/48 , H01L21/768 , H01L21/02 , H01L21/48
摘要： A field-effect transistor (FET) and method of manufacture thereof include patterning a mask above a source and drain of a FET to form holes in the mask, growing epitaxial structures from the holes in the mask, and growing a doped epitaxial shell to coat sidewalls of the epitaxial structures.
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