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    High-throughput compression of data
    1.
    发明授权
    High-throughput compression of data 有权

    公开(公告)号：US09813079B2

    公开(公告)日：2017-11-07

    申请号：US15056081

    申请日：2016-02-29

    Applicant: International Business Machines Corporation

    Inventor： Tobias Blaettler ,  Thomas Parnell

    IPC: G06F12/00 ,  H03M7/42 ,  G06F3/06 ,  H03M7/30

    CPC classification number: H03M7/42 ,  G06F3/0608 ,  G06F3/0661 ,  G06F3/0673 ,  H03M7/3086 ,  H03M7/3088 ,  H03M7/6017

    Abstract: A mechanism is provided for high-throughput compression of data. Responsive to receiving an indication of a match of a current 4-byte sequence from an incoming data stream to stored hash values in a set of hash tables, numerous variables are set to initial values. Responsive to receiving a subsequent 4-byte sequence from the incoming data stream and determining that an active match variable is set to one, the subsequent 4-byte sequence is compared to data in a copy of the incoming data stream in memory at an active position with a predefined length offset. A constraint variable is set to a number of bytes for which the match is to be extended. Responsive to the constraint variable being below a predetermined number, a length, distance pair is output indicating a match to a previous pattern in the incoming data stream.

    MULTIDIMENSIONAL PARTITIONED STORAGE ARRAY AND METHOD UTILIZING INPUT SHIFTERS TO ALLOW MULTIPLE ENTIRE COLUMNS OR ROWS TO BE ACCESSED IN A SINGLE CLOCK CYCLE
    4.
    发明申请
    MULTIDIMENSIONAL PARTITIONED STORAGE ARRAY AND METHOD UTILIZING INPUT SHIFTERS TO ALLOW MULTIPLE ENTIRE COLUMNS OR ROWS TO BE ACCESSED IN A SINGLE CLOCK CYCLE 有权
    多维分段存储阵列和使用输入切换器的方法允许在单个时钟周期中访问多个完整的列或行

    公开(公告)号：US20160170661A1

    公开(公告)日：2016-06-16

    申请号：US15051059

    申请日：2016-02-23

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

    Inventor： Tobias Blaettler ,  Charles J. Camp ,  Thomas Parnell

    IPC: G06F3/06

    CPC classification number: G06F3/0613 ,  G06F3/0619 ,  G06F3/0638 ,  G06F3/0644 ,  G06F3/0689 ,  G06F7/785 ,  G06F11/14

    Abstract: A multidimensional storage array system includes storage elements arranged in storage array partitions, multiple input shifters, and multiple output shifters. A particular input shifter and output shifter is associated with a particular storage array partition. The storage elements are physically arranged into rows and columns and each store particular bit(s) of a data word. The input shifter implements a positional shift to loaded data words to the associated partition. The output shifter reverses the shift of a received shifted data word that is requested by a requesting device such as a decoder. The shifted data words in the storage array expose, for example, row addressed data words or column addressed data word sections so that multiple row or column addressed data words may be unloaded from the array simultaneously in a single hardware clock cycle.

    Abstract translation: 多维存储阵列系统包括排列在存储阵列分区中的存储元件，多个输入移位器和多个输出移位器。 特定的输入移位器和输出移位器与特定的存储阵列分区相关联。 存储元件被物理地布置成行和列，并且每个存储数据字的特定位。 输入移位器实现向相关分区加载数据字的位置移位。 输出移位器反转由诸如解码器的请求设备请求的接收到的移位数据字的移位。 存储阵列中的移位的数据字暴露了例如行寻址数据字或列寻址数据字部分，使得可以在单个硬件时钟周期中同时从阵列中卸载多个行或列寻址的数据字。

    REMOVING ERROR PATTERNS IN BINARY DATA
    5.
    发明申请
    REMOVING ERROR PATTERNS IN BINARY DATA 有权
    删除二进制数据中的错误模式

    公开(公告)号：US20160126980A1

    公开(公告)日：2016-05-05

    申请号：US14791942

    申请日：2015-07-06

    Applicant: International Business Machines Corporation

    Inventor： Tobias Blaettler ,  Peter Mueller

    IPC: H03M13/29

    CPC classification number: H03M13/2927 ,  H03M13/2909 ,  H04L1/0057 ,  H04L1/0061

    Abstract: A method and a device for removing pathologic error patterns in binary data are proposed. The method comprises the operations of identifying a pathologic error pattern in the binary data, and inverting all bits of the identified pathologic error pattern.

    Abstract translation: 提出了一种用于去除二进制数据中病理错误模式的方法和装置。 该方法包括识别二进制数据中的病理错误模式和反转所识别的病理错误模式的所有位的操作。

    High-Throughput Compression of Data
    8.
    发明申请
    High-Throughput Compression of Data 有权

    公开(公告)号：US20170250708A1

    公开(公告)日：2017-08-31

    申请号：US15056081

    申请日：2016-02-29

    Applicant: International Business Machines Corporation

    Inventor： Tobias Blaettler ,  Thomas Parnell

    IPC: H03M7/42 ,  H03M7/30 ,  G06F3/06

    CPC classification number: H03M7/42 ,  G06F3/0608 ,  G06F3/0661 ,  G06F3/0673 ,  H03M7/3086 ,  H03M7/3088 ,  H03M7/6017

    Abstract: A mechanism is provided for high-throughput compression of data. Responsive to receiving an indication of a match of a current 4-byte sequence from an incoming data stream to stored hash values in a set of hash tables, numerous variables are set to initial values. Responsive to receiving a subsequent 4-byte sequence from the incoming data stream and determining that an active match variable is set to one, the subsequent 4-byte sequence is compared to data in a copy of the incoming data stream in memory at an active position with a predefined length offset. A constraint variable is set to a number of bytes for which the match is to be extended. Responsive to the constraint variable being below a predetermined number, a length, distance pair is output indicating a match to a previous pattern in the incoming data stream.

    Multidimensional storage array and method utilizing an input shifter to allow an entire column or row to be accessed in a single clock cycle
    9.
    发明授权
    Multidimensional storage array and method utilizing an input shifter to allow an entire column or row to be accessed in a single clock cycle 有权
    多维存储阵列和方法利用输入移位器来允许在单个时钟周期内访问整个列或行

    公开(公告)号：US09442661B2

    公开(公告)日：2016-09-13

    申请号：US14100883

    申请日：2013-12-09

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

    Inventor： Tobias Blaettler ,  Charles J. Camp ,  Thomas Parnell

    IPC: G06F3/06 ,  G06F11/14 ,  G06F12/00 ,  G06F7/78

    CPC classification number: G06F3/0613 ,  G06F3/0619 ,  G06F3/0638 ,  G06F3/0689 ,  G06F7/785 ,  G06F11/14

    Abstract: A multidimensional storage array includes independently addressable storage elements and an input shifter. The storage elements are physically arranged into rows and columns and store particular bit(s) of a data word. The input shifter implements a circular shift to serially loaded data words to the multidimensional storage array. An output shifter may reverse the circular shift of a requested data word. The data entering the storage array may be shifted to expose column addressed data such that an entire column or columns may be fed to a requesting device in a single hardware clock cycle and/or may be shifted to expose row addressed data such that an entire row or rows may be fed to the requesting device in a single hardware clock cycle. The data entering the storage array may be shifted such that column addressed data words may be stored in a plurality of diagonally arranged storage elements.

    Abstract translation: 多维存储阵列包括可独立寻址的存储元件和输入移位器。 存储元件物理地排列成行和列并存储数据字的特定位。 输入移位器实现向多维存储阵列的串行数据字的循环移位。 输出移位器可以反转所请求的数据字的循环移位。 可以移动进入存储阵列的数据以暴露列寻址数据，使得整个列或列可以在单个硬件时钟周期中被馈送到请求设备，和/或可以移位以暴露行寻址数据，使得整行 或者行可以在单个硬件时钟周期中馈送到请求设备。 进入存储阵列的数据可以被移位，使得列地址数据字可以被存储在多个对角排列的存储元件中。

    DIAGONAL ANTI-DIAGONAL MEMORY STRUCTURE
    10.
    发明申请
    DIAGONAL ANTI-DIAGONAL MEMORY STRUCTURE 有权
    对角线对抗记忆结构

    公开(公告)号：US20160188230A1

    公开(公告)日：2016-06-30

    申请号：US14583738

    申请日：2014-12-28

    Applicant: International Business Machines Corporation

    Inventor： Tobias Blaettler ,  Charles J. Camp ,  Thomas Mittelholzer ,  Nikolaos Papandreou ,  Thomas Parnell ,  Charalampos Pozidis

    IPC: G06F3/06 ,  H03M13/29

    CPC classification number: H03M13/2921 ,  G06F3/0613 ,  G06F3/0619 ,  G06F3/0644 ,  G06F3/0673 ,  H03M13/616

    Abstract: A quarter product code codeword includes various R code symbols and C code symbols each including a plurality of symbols. Each symbol is loaded into a diagonal anti-diagonal structure in two unique locations. To provide for fast loading, the symbols may be shifted by one or more shift registers associated with the diagonal or anti-diagonal structure. The two locations at which each symbol is positioned are included within different diagonals or anti-diagonals making it possible to load or unload either symbol or multiple symbols in a single clock cycle. Further, by partitioning the diagonal anti-diagonal structure, multiple respective symbols or plurality of symbols may be loaded or unloaded in a single clock cycle.

    Abstract translation: 四分之一产品代码码字包括各自包含多个符号的各种R码符号和C码符号。 每个符号被加载到两个独特位置的对角线对角线结构中。 为了提供快速加载，符号可以被与对角线或反对角线结构相关联的一个或多个移位寄存器移位。 每个符号位于的两个位置包括在不同的对角线或反对角线内，使得可以在单个时钟周期内加载或卸载符号或多个符号。 此外，通过划分对角线对角线结构，可以在单个时钟周期内加载或卸载多个相应符号或多个符号。

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