公开(公告)号：US08097503B2

公开(公告)日：2012-01-17

申请号：US12926357

申请日：2010-11-12

申请人： Isao Kamioka ,  Junichi Shiozawa ,  Ryu Kato ,  Yoshio Ozawa

发明人： Isao Kamioka ,  Junichi Shiozawa ,  Ryu Kato ,  Yoshio Ozawa

IPC分类号： H01L21/337 ,  H01L21/8236

CPC分类号： H01L29/7881 ,  H01L21/76208 ,  H01L27/11521 ,  H01L29/66825

摘要： A method of manufacturing a semiconductor device according to an embodiment of the present invention includes forming, on a surface of a semiconductor substrate, an isolation trench including sidewall parts and a bottom part, or a stepped structure including a first planar part, a second planar part, and a step part located at a boundary between the first planar part and the second planar part, and supplying oxidizing ions or nitriding ions contained in plasma generated by a microwave, a radio-frequency wave, or electron cyclotron resonance to the sidewall parts and the bottom part of the isolation trench or the first and second planar parts and the step part of the stepped structure by applying a predetermined voltage to the semiconductor substrate, to perform anisotropic oxidation or anisotropic nitridation of the sidewall parts and the bottom part of the isolation trench or the first and second planar parts and the step part of the stepped structure.

摘要翻译： 根据本发明实施例的制造半导体器件的方法包括在半导体衬底的表面上形成包括侧壁部分和底部的隔离沟槽，或者包括第一平面部分，第二平面部分 部分和位于第一平面部分和第二平面部分之间的边界处的阶梯部分，并且将由微波产生的等离子体中产生的等离子体中的氧离子或氮化离子，射频波或电子回旋共振提供给侧壁部分 以及通过向半导体衬底施加预定电压来隔离沟槽的底部或第一和第二平面部分和台阶部分的台阶部分，以进行侧壁部分和底部部分的各向异性氧化或各向异性氮化 隔离沟槽或第一和第二平面部分以及台阶结构的阶梯部分。

公开(公告)号：US07927949B2

公开(公告)日：2011-04-19

申请号：US12755532

申请日：2010-04-07

申请人： Yoshio Ozawa ,  Isao Kamioka ,  Junichi Shiozawa ,  Akihito Yamamoto ,  Ryota Fujitsuka ,  Yoshihiro Ogawa ,  Katsuaki Natori ,  Katsuyuki Sekine ,  Masayuki Tanaka ,  Daisuke Nishida

发明人： Yoshio Ozawa ,  Isao Kamioka ,  Junichi Shiozawa ,  Akihito Yamamoto ,  Ryota Fujitsuka ,  Yoshihiro Ogawa ,  Katsuaki Natori ,  Katsuyuki Sekine ,  Masayuki Tanaka ,  Daisuke Nishida

IPC分类号： H01L21/336 ,  H01L21/8238 ,  H01L21/3205 ,  H01L21/4763

CPC分类号： H01L27/115 ,  H01L27/11521

摘要： A semiconductor memory device manufacturing method includes forming a floating gate electrode above a semiconductor substrate, forming an interelectrode insulating film above the floating gate electrode, forming a first radical nitride film on a surface of the interelectrode insulating film by first radical nitriding, and forming a control gate electrode on the first radical nitride film.

摘要翻译： 一种半导体存储器件制造方法，包括在半导体衬底上形成浮置栅电极，在浮置栅电极上形成电极间绝缘膜，通过第一自由基氮化在电极间绝缘膜的表面上形成第一自由基氮化物膜， 第一自由基氮化物膜上的控制栅电极。

公开(公告)号：US20090269894A1

公开(公告)日：2009-10-29

申请号：US12457892

申请日：2009-06-24

申请人： Yoshio Ozawa ,  Isao Kamioka

发明人： Yoshio Ozawa ,  Isao Kamioka

IPC分类号： H01L21/336

CPC分类号： H01L29/6656 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/66575 ,  H01L29/66825 ,  H01L29/78

摘要： A semiconductor device includes a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film, a source/drain diffusion layer formed in the semiconductor substrate at both sides of the gate electrode, and a channel region formed in the semiconductor substrate between a source and a drain of the source/drain diffusion layer and arranged below the gate insulating film, wherein an upper surface of the source/drain diffusion layer is positioned below a bottom surface of the gate electrode, and an upper surface of the channel region is positioned below the upper surface of the source/drain diffusion layer.

摘要翻译： 半导体器件包括半导体衬底，形成在半导体衬底上的栅极绝缘膜，形成在栅极绝缘膜上的栅电极，形成在栅电极两侧的半导体衬底中的源极/漏极扩散层，以及沟道 在所述源极/漏极扩散层的源极和漏极之间形成并布置在所述栅极绝缘膜的下方的所述半导体衬底中的所述源极/漏极扩散层的上表面位于所述栅电极的底表面的下方，以及 沟道区的上表面位于源/漏扩散层的上表面的下方。

公开(公告)号：US20080261370A1

公开(公告)日：2008-10-23

申请号：US12155272

申请日：2008-06-02

申请人： Isao Kamioka ,  Yoshio Ozawa

发明人： Isao Kamioka ,  Yoshio Ozawa

IPC分类号： H01L21/336

CPC分类号： H01L29/40114 ,  H01L21/3247 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524

摘要： According to the present invention, there is provided a semiconductor device fabrication method comprising: forming a first insulating film on a semiconductor substrate; forming a first conductive layer on the first insulating film; forming a second insulating film on the first conductive layer in a first processing chamber isolated from an outside; performing a modification process on the second insulating film in the first processing chamber, and unloading the semiconductor substrate from the first processing chamber to the outside; annealing the second insulating film in a second processing chamber; and forming a second conductive layer on the second insulating film.

摘要翻译： 根据本发明，提供一种半导体器件制造方法，包括：在半导体衬底上形成第一绝缘膜; 在所述第一绝缘膜上形成第一导电层; 在与外部隔离的第一处理室中在所述第一导电层上形成第二绝缘膜; 对第一处理室中的第二绝缘膜执行修改处理，并将半导体衬底从第一处理室卸载到外部; 在第二处理室中退火第二绝缘膜; 以及在所述第二绝缘膜上形成第二导电层。

公开(公告)号：US07396721B2

公开(公告)日：2008-07-08

申请号：US11130128

申请日：2005-05-17

申请人： Isao Kamioka ,  Yoshio Ozawa

发明人： Isao Kamioka ,  Yoshio Ozawa

IPC分类号： H01L21/336

CPC分类号： H01L21/28273 ,  H01L21/3247 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524

摘要： According to the present invention, there is provided a semiconductor device fabrication method comprising: forming a first insulating film on a semiconductor substrate; forming a first conductive layer on the first insulating film; forming a second insulating film on the first conductive layer in a first processing chamber isolated from an outside; performing a modification process on the second insulating film in the first processing chamber, and unloading the semiconductor substrate from the first processing chamber to the outside; annealing the second insulating film in a second processing chamber; and forming a second conductive layer on the second insulating film.

摘要翻译： 根据本发明，提供一种半导体器件制造方法，包括：在半导体衬底上形成第一绝缘膜; 在所述第一绝缘膜上形成第一导电层; 在与外部隔离的第一处理室中在所述第一导电层上形成第二绝缘膜; 对第一处理室中的第二绝缘膜执行修改处理，并将半导体衬底从第一处理室卸载到外部; 在第二处理室中退火第二绝缘膜; 以及在所述第二绝缘膜上形成第二导电层。

公开(公告)号：US20120282773A1

公开(公告)日：2012-11-08

申请号：US13487280

申请日：2012-06-04

申请人： Isao Kamioka ,  Junichi Shiozawa ,  Ryu Kato ,  Yoshio Ozawa

发明人： Isao Kamioka ,  Junichi Shiozawa ,  Ryu Kato ,  Yoshio Ozawa

IPC分类号： H01L21/302

CPC分类号： H01L29/7881 ,  H01L21/76208 ,  H01L27/11521 ,  H01L29/66825

摘要： In one embodiment, a method of manufacturing a semiconductor device includes forming a conductive film whose upper surface and side surface are exposed and an insulation film whose upper surface is exposed, on a semiconductor substrate. The method further includes supplying oxidizing ions or nitriding ions contained in plasma generated by a microwave, a radio-frequency wave, or electron cyclotron resonance to the exposed side surface of the conductive film and the exposed upper surface of the insulation film, by applying a predetermined voltage to the semiconductor substrate, thereby performing anisotropic oxidation or anisotropic nitridation of the exposed side surface of the conductive film and the exposed upper surface of the insulation film.

摘要翻译： 在一个实施例中，制造半导体器件的方法包括在半导体衬底上形成其上表面和侧表面被暴露的导电膜和上表面暴露的绝缘膜。 该方法还包括通过施加微波，射频波或电子回旋共振等将由等离子体产生的等离子体中包含的氧化离子或氮化离子供应到导电膜的暴露侧表面和绝缘膜的暴露的上表面 对半导体衬底施加预定的电压，从而进行导电膜的暴露的侧表面和绝缘膜的暴露的上表面的各向异性氧化或各向异性氮化。

公开(公告)号：US20100087041A1

公开(公告)日：2010-04-08

申请号：US12591826

申请日：2009-12-02

申请人： Isao Kamioka ,  Yoshio Ozawa

发明人： Isao Kamioka ,  Yoshio Ozawa

IPC分类号： H01L21/336

CPC分类号： H01L27/11524 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11526 ,  H01L27/11529 ,  H01L2924/0002 ,  H01L2924/00

摘要： According to the present invention, there is provided a semiconductor device fabrication method comprising: forming a first insulating film on a semiconductor substrate; forming a conductive layer on the first insulating film; exposing the first insulating film by removing a portion of the conductive layer; forming a second insulating film on the exposed surface of the first insulating film in a first processing chamber isolated from an outside; performing a modification process on the second insulating film in the first processing chamber, and then unloading the semiconductor substrate from the first processing chamber to the outside; and annealing the second insulating film in a second processing chamber.

摘要翻译： 根据本发明，提供一种半导体器件制造方法，包括：在半导体衬底上形成第一绝缘膜; 在所述第一绝缘膜上形成导电层; 通过去除导电层的一部分来暴露第一绝缘膜; 在与外部隔离的第一处理室中在第一绝缘膜的暴露表面上形成第二绝缘膜; 对第一处理室中的第二绝缘膜执行修改处理，然后将半导体衬底从第一处理室卸载到外部; 以及在第二处理室中退火所述第二绝缘膜。

公开(公告)号：US07645711B2

公开(公告)日：2010-01-12

申请号：US11106468

申请日：2005-04-15

申请人： Isao Kamioka ,  Yoshio Ozawa

发明人： Isao Kamioka ,  Yoshio Ozawa

IPC分类号： H01L21/31

CPC分类号： H01L27/11524 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11526 ,  H01L27/11529 ,  H01L2924/0002 ,  H01L2924/00

摘要： According to the present invention, there is provided a semiconductor device fabrication method comprising: forming a first insulating film on a semiconductor substrate; forming a conductive layer on the first insulating film; exposing the first insulating film by removing a portion of the conductive layer; forming a second insulating film on the exposed surface of the first insulating film in a first processing chamber isolated from an outside; performing a modification process on the second insulating film in the first processing chamber, and then unloading the semiconductor substrate from the first processing chamber to the outside; and annealing the second insulating film in a second processing chamber.

公开(公告)号：US20070196985A1

公开(公告)日：2007-08-23

申请号：US11699502

申请日：2007-01-30

申请人： Yoshio Ozawa ,  Isao Kamioka ,  Junichi Shiozawa ,  Akihito Yamamoto ,  Ryota Fujitsuka ,  Yoshihiro Ogawa ,  Katsuaki Natori ,  Katsuyuki Sekine ,  Masayuki Tanaka ,  Daisuke Nishida

发明人： Yoshio Ozawa ,  Isao Kamioka ,  Junichi Shiozawa ,  Akihito Yamamoto ,  Ryota Fujitsuka ,  Yoshihiro Ogawa ,  Katsuaki Natori ,  Katsuyuki Sekine ,  Masayuki Tanaka ,  Daisuke Nishida

IPC分类号： H01L21/336

CPC分类号： H01L27/115 ,  H01L27/11521

摘要： A semiconductor memory device manufacturing method includes forming a floating gate electrode above a semiconductor substrate, forming an interelectrode insulating film above the floating gate electrode, forming a first radical nitride film on a surface of the interelectrode insulating film by first radical nitriding, and forming a control gate electrode on the first radical nitride film.

摘要翻译： 一种半导体存储器件制造方法，包括在半导体衬底上形成浮置栅电极，在浮置栅电极上形成电极间绝缘膜，通过第一自由基氮化在电极间绝缘膜的表面上形成第一自由基氮化物膜， 第一自由基氮化物膜上的控制栅电极。

公开(公告)号：US08404537B2

公开(公告)日：2013-03-26

申请号：US13487280

申请日：2012-06-04

申请人： Isao Kamioka ,  Junichi Shiozawa ,  Ryu Kato ,  Yoshio Ozawa

发明人： Isao Kamioka ,  Junichi Shiozawa ,  Ryu Kato ,  Yoshio Ozawa

IPC分类号： H01L21/337 ,  H01L21/8236

CPC分类号： H01L29/7881 ,  H01L21/76208 ,  H01L27/11521 ,  H01L29/66825

摘要： In one embodiment, a method of manufacturing a semiconductor device includes forming a conductive film whose upper surface and side surface are exposed and an insulation film whose upper surface is exposed, on a semiconductor substrate. The method further includes supplying oxidizing ions or nitriding ions contained in plasma generated by a microwave, a radio-frequency wave, or electron cyclotron resonance to the exposed side surface of the conductive film and the exposed upper surface of the insulation film, by applying a predetermined voltage to the semiconductor substrate, thereby performing anisotropic oxidation or anisotropic nitridation of the exposed side surface of the conductive film and the exposed upper surface of the insulation film.

摘要翻译： 在一个实施例中，制造半导体器件的方法包括在半导体衬底上形成其上表面和侧表面被暴露的导电膜和上表面暴露的绝缘膜。 该方法还包括通过施加微波，射频波或电子回旋共振等将由等离子体产生的等离子体中包含的氧化离子或氮化离子供应到导电膜的暴露侧表面和绝缘膜的暴露的上表面 对半导体衬底施加预定的电压，从而进行导电膜的暴露的侧表面和绝缘膜的暴露的上表面的各向异性氧化或各向异性氮化。