公开(公告)号：US20160181194A1

公开(公告)日：2016-06-23

申请号：US14964121

申请日：2015-12-09

Applicant: J-Devices Corporation

Inventor： Yoshihiko IKEMOTO ,  Shigenori SAWACHI ,  Fumihiko TANIGUCHI ,  Akio KATSUMATA

IPC: H01L23/498 ,  H01L23/31

CPC classification number: H01L23/3142 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5227 ,  H01L23/552 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267

Abstract: The present invention is to provide a semiconductor device in which the generation of the eddy current in a metal flat plate is reduced, and the Q value of the RF circuit of the semiconductor device is improved even using the metal flat plate as a support.

Abstract translation: 本发明提供一种半导体器件，其中金属平板中的涡电流的产生减小，并且即使使用金属平板作为支撑件，也提高了半导体器件的RF电路的Q值。

公开(公告)号：US20160027695A1

公开(公告)日：2016-01-28

申请号：US14801437

申请日：2015-07-16

Applicant: J-DEVICES CORPORATION

Inventor： Yoshihiko IKEMOTO ,  Hiroshi INOUE ,  Kiminori ISHIDO ,  Hiroaki MATSUBARA ,  Yukari IMAIZUMI

IPC: H01L21/78 ,  H01L23/48

CPC classification number: H01L21/78 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/562 ,  H01L24/19 ,  H01L25/0657 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/68372 ,  H01L2221/68381 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2225/06524 ,  H01L2225/06565 ,  H01L2225/06586 ,  H01L2224/83

Abstract: The invention provides a semiconductor device low in height and having low heat resistance, and a method of manufacturing the semiconductor device. Disclosed is a semiconductor device including: a support plate 1; a semiconductor chip 2 mounted on one principal surface of the support plate 1 via an adhesive layer, with the element circuit surface of the chip being directed upward; an insulation material layer 4 that seals the semiconductor chip 2 and the periphery of the semiconductor chip; openings formed on an electrode arranged on the element circuit surface of the semiconductor chip 2 in the insulation material layer 4; conductive portions 6 formed in the openings so as to be connected to the electrode of the semiconductor chip; a wiring layer 5 formed on the insulation material layer 4 so as to be connected to the conductive portions 6 and partially extending to the peripheral region of the semiconductor chip 2; and external electrodes 7 formed on the wiring layer 5, wherein the support plate 1 is a flat plate that constitutes the outermost layer of a combined support plate and is separated from the combined support plate in which a plurality of flat plates used in the process of manufacturing the semiconductor device is laminated to each other.

Abstract translation: 本发明提供了一种半导体器件的高度低，耐热性低的半导体器件，以及半导体器件的制造方法。 公开了一种半导体器件，包括：支撑板1; 半导体芯片2，其经由粘合剂层安装在支撑板1的一个主表面上，芯片的元件电路表面朝向上方; 绝缘材料层4，其密封半导体芯片2和半导体芯片的周围; 形成在绝缘材料层4上的布置在半导体芯片2的元件电路表面上的电极上的开口; 形成在开口中以与半导体芯片的电极连接的导电部分6; 形成在绝缘材料层4上的布线层5，以连接到导电部分6并且部分地延伸到半导体芯片2的周边区域; 以及形成在布线层5上的外部电极7，其中支撑板1是构成组合的支撑板的最外层的平板，并且与组合的支撑板分离，在该组合的支撑板中使用多个平板 制造半导体器件彼此层叠。