公开(公告)号：US12020644B2

公开(公告)日：2024-06-25

申请号：US17987273

申请日：2022-11-15

Applicant: JOLED INC.

Inventor： Toshiyuki Kato

IPC: G09G3/3233

CPC classification number: G09G3/3233 ,  G09G2310/08 ,  G09G2330/02 ,  G09G2330/021

Abstract: A current limiting circuit includes: a delay circuit that receives a video signal, and outputs a delay signal obtained by delaying the video signal by a time period corresponding to one frame; a calculation circuit that receives the video signal, and calculates a gain by which the delay signal is to be multiplied, based on power consumption of the pixels corresponding to the delay signal and power consumption of the pixels corresponding to the video signal; and a gain multiplication circuit that multiplies the delay signal by the gain.

公开(公告)号：US10522088B2

公开(公告)日：2019-12-31

申请号：US16009671

申请日：2018-06-15

Applicant: JOLED INC.

Inventor： Toshiyuki Kato

IPC: G09G3/32 ,  G09G3/3266 ,  G09G3/3275

Abstract: A signal processing circuit includes an accumulator circuit that accumulates display history information regarding light-emitting devices, and a detection circuit that detects the degree of deterioration of a display panel by the accumulated display history information and detects a rotation-recommended state of the display panel on the basis of the degree of deterioration. In the case where the display panel is divided into a plurality of blocks each including the same number of pixel circuits, the detection circuit detects the degree of deterioration for each of the blocks, and if the number of the blocks whose degrees of deterioration are greater than or equal to a first threshold value determined in advance is greater than or equal to a predetermined number, detects that the display panel is in the rotation-recommended state.

公开(公告)号：US12106725B2

公开(公告)日：2024-10-01

申请号：US17959756

申请日：2022-10-04

Applicant: JOLED INC.

Inventor： Hiroaki Ishii ,  Toshiyuki Kato

IPC: G09G3/3233 ,  G09G3/20 ,  G09G3/3258 ,  G09G3/34

CPC classification number: G09G3/3413 ,  G09G3/2018 ,  G09G3/3233 ,  G09G3/3258 ,  G09G2300/0861 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/0247

Abstract: A control device for a display panel for applications where a frame period in which a same image continues to be displayed varies from frame to frame within a certain range or the frame period is temporarily stable across frames and where a precise frame period is undetermined beforehand. The control device controls the display panel such that, when a frame having a length exceeding a preset number of lines is input, the display panel displays an image over a frame period corresponding to the preset number of lines and an added period added after the frame period. The added period includes one or more individual added periods each including a light emission period and a light extinction period, and the one or more individual added periods are each a period corresponding a predetermined number of lines.

公开(公告)号：US11107403B2

公开(公告)日：2021-08-31

申请号：US17027090

申请日：2020-09-21

Applicant: JOLED INC.

Inventor： Toshiyuki Kato

IPC: G09G3/3233

Abstract: A current limiting circuit includes: a gain calculation circuit which calculates a screen power value based on pixel values and calculates a gain based on the screen power value; and a gain multiplication circuit which multiplies the pixel values by the gain, and when a maximum value of the pixel values exceeds a first threshold value, the gain calculation circuit calculates the screen power value by use of a common pixel value greater than or equal to the maximum value instead of the pixel values, and when the screen power value exceeds a control target power value, the gain calculation circuit sets the gain to a ratio of the control target power value with respect to the screen power value, and when the screen power value is less than or equal to the control target power value, the gain calculation circuit sets the gain to 1.

公开(公告)号：US10140950B2

公开(公告)日：2018-11-27

申请号：US15347863

申请日：2016-11-10

Applicant: JOLED INC.

Inventor： Toshiyuki Kato

IPC: G09G3/36 ,  G09G5/00 ,  H04N5/04 ,  G09G5/12 ,  H04N21/242 ,  H04N21/43 ,  H04N21/443 ,  H04N21/8547

Abstract: The present disclosure provides a display device driving method and the like that can suppress degradation of display quality at the time of switching to a video based on a video signal from an external signal source. The display device driving method according to the present disclosure includes: receiving a training signal transmitted from an external signal source; after receiving the training signal, transmitting a lock signal to the external signal source at a timing based on an internal synchronization signal of the display device; after transmitting the lock signal, receiving a video signal that is transmitted from the external signal source and is synchronous with an external synchronization signal; and displaying a video by using the video signal received from the external signal source.

公开(公告)号：US09185751B2

公开(公告)日：2015-11-10

申请号：US13768217

申请日：2013-02-15

Applicant: JOLED INC.

Inventor： Kouhei Ebisuno ,  Toshiyuki Kato

IPC: G09G3/30 ,  H05B33/08 ,  G09G3/32

CPC classification number: H05B33/08 ,  G09G3/3225 ,  G09G3/3275 ,  G09G2320/0223 ,  G09G2320/0233 ,  G09G2320/029 ,  G09G2330/028

Abstract: A display device includes: a high-side potential variable-voltage source which outputs a high-side output potential and a low-side potential variable-voltage source which outputs a low-side output potential; an organic EL display unit in which pixels are arranged; a high-side potential difference detecting circuit which detects a high-side potential applied to a first pixel and a low-side potential difference detecting circuit which detects a low-side potential applied to a second pixel; a high-side potential voltage margin setting unit and a low-side potential voltage setting unit which regulate the output potential of the high-side potential variable-voltage source and the low-side potential variable-voltage source to set a potential difference between the high-side potential of the first pixel and a reference potential to a predetermined potential difference and set a potential difference between the low-side potential of the second pixel and a reference potential to a predetermined potential difference; and a signal processing circuit.

Abstract translation: 显示装置包括：输出高侧输出电位的高侧电位可变电压源和输出低侧输出电位的低侧电位可变电压源; 设置像素的有机EL显示单元; 检测施加到第一像素的高侧电位的高侧电位差检测电路和检测施加到第二像素的低侧电位的低侧电位差检测电路; 高侧电位电压余量设定单元和低侧电压设定单元，其调节高侧电位可变电压源和低侧电位可变电压源的输出电位，以设定电位差 将第一像素的高侧电位和基准电位设定为规定的电位差，将第二像素的低侧电位与基准电位之间的电位差设定为规定的电位差; 和信号处理电路。

公开(公告)号：US09105231B2

公开(公告)日：2015-08-11

申请号：US13768334

申请日：2013-02-15

Applicant: JOLED INC.

Inventor： Kouhei Ebisuno ,  Toshiyuki Kato ,  Yasuo Segawa ,  Shinya Ono ,  Yosuke Izawa ,  Takashi Osako

IPC: G06F3/038 ,  G09G5/00 ,  G09G3/30 ,  G09G3/32

CPC classification number: G09G3/3208 ,  G09G3/3233 ,  G09G3/3258 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2300/043 ,  G09G2320/0223 ,  G09G2320/0233 ,  G09G2320/029 ,  G09G2320/043 ,  G09G2320/064 ,  G09G2330/021 ,  G09G2330/12

Abstract: A display device includes: a power supplying unit which outputs at least one of a high-side output potential and a low-side output potential; a display unit in which pixels are arranged in a matrix and which receives power supply from the power supplying unit; a monitor wire arranged along a column direction of the pixels in the matrix, which has one end connected to at least one pixel inside the display unit, and is for transmitting the high-side potential to be applied to the pixel; and a voltage regulating unit connected to the other end of the monitor wire, which regulates at least one of the high-side output potential and the low-side output potential to be outputted by the power supplying unit, to set a potential difference between the high-side potential and the low-side potential to a predetermined potential difference.

Abstract translation: 显示装置包括：输出高侧输出电位和低侧输出电位中的至少一个的供电单元; 像素以矩阵形式布置并从电力供给单元接收电力的显示单元; 沿着矩阵中的像素的列方向布置的监视器线，其一端连接到显示单元内的至少一个像素，并且用于发送要施加到像素的高侧电位; 以及电压调节单元，其连接到所述监视器线的另一端，其调节要由所述供电单元输出的所述高侧输出电位和所述低侧输出电位中的至少一个，以设定所述电源 高侧电位和低侧电位达到预定电位差。

公开(公告)号：US11100859B2

公开(公告)日：2021-08-24

申请号：US16774743

申请日：2020-01-28

Applicant: JOLED INC.

Inventor： Toshiyuki Kato

IPC: G09G3/3233 ,  G09G3/3291 ,  H04N5/369

Abstract: A processing circuit processes video signals for a display device which includes a display panel including pixels each having a self light emitting element and a current limiting circuit limiting a current to the pixels. The processing circuit includes: a frame memory storing video signals of a previous frame; and a signal processer which: compares a luminance represented by a video signal of the current frame corresponding to a pixel and a luminance represented by a video signal of the previous frame corresponding to the pixel; outputs the video signal of the current frame in a case where the luminance represented by the video signal of the current frame is equal to or smaller than the luminance represented by the video signal of the previous frame or equal to or smaller than a predetermined threshold value; and outputs a weighted average of the video signal of the current frame and the video signal of the previous frame in any other case.

公开(公告)号：US09773452B2

公开(公告)日：2017-09-26

申请号：US14904741

申请日：2014-06-12

Applicant: JOLED INC.

Inventor： Masaru Nishimura ,  Toshiyuki Kato ,  Hirofumi Nakagawa

IPC: G09G3/30 ,  G09G3/3258 ,  H05B33/08 ,  G09G3/3266 ,  G09G3/10

CPC classification number: G09G3/3258 ,  G09G3/3266 ,  G09G2300/0871 ,  G09G2310/0286 ,  G09G2310/0291 ,  G09G2310/068 ,  G09G2320/0223 ,  G09G2320/0233 ,  G09G2320/041 ,  G09G2330/045 ,  G09G2330/08 ,  H05B33/08 ,  Y02B20/32

Abstract: An EL display apparatus includes: gate driver ICs (i. e., gate driver circuits); a plurality of pixels; gate signal lines each transmit a selection voltage for selecting a pixel from the pixels and non-selection voltage for placing a pixel in a non-selection state; and TCON. The pixels each include: a driving transistor; an EL element; a first switching transistor; and a second switching transistor. The gate driver ICs each include scanning and outputting buffer circuits which are connected to TCON to which an output signal of each of the scanning and outputting buffer circuits is inputted.

公开(公告)号：US09595225B2

公开(公告)日：2017-03-14

申请号：US14004430

申请日：2012-10-25

Applicant: JOLED INC.

Inventor： Kouhei Ebisuno ,  Toshiyuki Kato ,  Shinya Ono

IPC: G06F3/038 ,  G09G3/32

CPC classification number: G09G3/3241 ,  G09G3/3225 ,  G09G2300/0426 ,  G09G2320/0223 ,  G09G2320/0233 ,  G09G2320/0285 ,  G09G2330/021 ,  G09G2330/028

Abstract: A display device includes a voltage drop amount calculating circuit that regulates a power source voltage, a power wire network in the organic EL display unit includes a row-wise resistance component Rah and a column-wise resistance component Rav, and the voltage drop amount calculating circuit divides the organic EL display unit into blocks each made up of pixels in Xv rows and Xh columns, and sets, for each of the blocks, a row-wise resistance component Rah′ to a value obtained by multiplying the resistance component Rah by (Xh/Xv), and sets, for each of the blocks, a column-wise resistance component Rav′ to a value obtained by multiplying the resistance component Rav by (Xv/Xh), thereby estimating a distribution, for the respective blocks, of amounts of voltage drop which occurs in the power wire, and regulates, based on the distribution, a voltage to be supplied to the display unit.

Abstract translation: 显示装置包括调节电源电压的电压降量计算电路，有机EL显示单元中的电力线网络包括行方向电阻分量Rah和列方向电阻分量Rav，电压降计算 电路将有机EL显示单元划分为由Xv行和Xh列中的像素组成的块，并且将每个块的行方向电阻分量Rah'设置为通过将电阻分量Rah乘以（ Xh / Xv），并且对于每个块，将列列电阻分量Rav'设置为通过将电阻分量Rav乘以（Xv / Xh）而获得的值，从而估计各块的分布 在电源线中发生的电压降的量，并且基于分布来调节要提供给显示单元的电压。