公开(公告)号：US08685827B2

公开(公告)日：2014-04-01

申请号：US13181542

申请日：2011-07-13

申请人： Ju Youn Kim ,  Jedon Kim

发明人： Ju Youn Kim ,  Jedon Kim

IPC分类号： H01L21/20

CPC分类号： H01L28/20 ,  H01L21/82345 ,  H01L21/823842 ,  H01L27/0629

摘要： A method for manufacturing a semiconductor device, comprising forming a first gate stack portion on a substrate, the first gate stack portion including a first gate oxide layer and a first polysilicon layer on the first gate oxide layer, forming a second gate stack portion on the substrate, the second gate stack portion including a second gate oxide layer and a second polysilicon layer on the second gate oxide layer, forming a resistor portion on the substrate, the resistor portion including a third gate oxide layer and a third polysilicon layer on the third gate oxide layer, covering the resistor portion with a photoresist, removing respective first portions of the first and second polysilicon layers from the first and second gate stack portions, removing the photoresist from the resistor portion, and after removing the photoresist from the resistor portion, removing respective remaining portions of the first and second polysilicon layers from the first and second gate stack portions.

摘要翻译： 一种制造半导体器件的方法，包括在衬底上形成第一栅极叠层部分，所述第一栅叠层部分包括在所述第一栅极氧化物层上的第一栅极氧化物层和第一多晶硅层，在所述第一栅极堆叠部分上形成第二栅极叠层部分 衬底，所述第二栅堆叠部分包括在所述第二栅极氧化物层上的第二栅极氧化物层和第二多晶硅层，在所述衬底上形成电阻器部分，所述电阻器部分包括第三栅极氧化物层和第三多晶硅层， 栅极氧化物层，用光致抗蚀剂覆盖电阻器部分，从第一和第二栅极堆叠部分去除第一和第二多晶硅层的相应的第一部分，从电阻器部分去除光致抗蚀剂，并且在从电阻器部分去除光致抗蚀剂之后， 从第一和第二栅堆叠部分去除第一和第二多晶硅层的各个剩余部分。

公开(公告)号：US20130015531A1

公开(公告)日：2013-01-17

申请号：US13182594

申请日：2011-07-14

申请人： Ju Youn Kim ,  Jedon Kim

发明人： Ju Youn Kim ,  Jedon Kim

IPC分类号： H01L21/20 ,  H01L27/06 ,  B82Y40/00

CPC分类号： H01L28/20 ,  H01L21/28123 ,  H01L21/82345 ,  H01L21/823481 ,  H01L21/823842 ,  H01L21/823878 ,  H01L27/0629 ,  H01L29/165 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/7833 ,  H01L29/7843

摘要： A method for manufacturing a semiconductor device, comprising forming a first gate stack portion on a surface of a substrate, the first gate stack portion including a first gate oxide layer and a first polysilicon layer on the first gate oxide layer, forming a second gate stack portion on the surface of the substrate, the second gate stack portion including a second gate oxide layer and a second polysilicon layer on the second gate oxide layer, forming a resistor portion in a recessed portion of the substrate below the surface of the substrate, the resistor portion including a third polysilicon layer, and removing the first and second polysilicon layers from the first and second gate stack portions to expose the first and second gate oxide layers, wherein at least one of a dielectric layer and a stress liner cover a top surface of the resistor portion during removal of the first and second polysilicon layers.

摘要翻译： 一种制造半导体器件的方法，包括在衬底的表面上形成第一栅极叠层部分，所述第一栅极堆叠部分包括第一栅极氧化物层和第一栅极氧化物层上的第一多晶硅层，形成第二栅极堆叠 所述第二栅叠层部分包括在所述第二栅极氧化物层上的第二栅极氧化物层和第二多晶硅层，在所述衬底的所述衬底的表面下方的凹陷部分中形成电阻器部分， 电阻器部分，其包括第三多晶硅层，以及从所述第一和第二栅极堆叠部分去除所述第一和第二多晶硅层以暴露所述第一和第二栅极氧化物层，其中介电层和应力衬里中的至少一个覆盖顶表面 在去除第一和第二多晶硅层期间的电阻器部分。

公开(公告)号：US20130082332A1

公开(公告)日：2013-04-04

申请号：US13249643

申请日：2011-09-30

申请人： Jinping Liu ,  Min Dai ,  Ju Youn Kim ,  Michael P. Chudzik ,  Jedon Kim ,  Sungkee Han

发明人： Jinping Liu ,  Min Dai ,  Ju Youn Kim ,  Michael P. Chudzik ,  Jedon Kim ,  Sungkee Han

IPC分类号： H01L27/092 ,  H01L21/28

CPC分类号： H01L21/823842 ,  H01L21/28185 ,  H01L21/823857 ,  H01L21/823864 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/7833

摘要： Semiconductor devices with replacement gate electrodes are formed with different materials in the work function layers. Embodiments include forming first and second removable gates on a substrate, forming first and second pairs of spacers on opposite sides of the first and second removable gates, respectively, forming a hardmask layer over the second removable gate, removing the first removable gate, forming a first cavity between the first pair of spacers, forming a first work function material in the first cavity, removing the hardmask layer and the second removable gate, forming a second cavity between the second pair of spacers, and forming a second work function material, different from the first work function material, in the second cavity.

摘要翻译： 具有替换栅电极的半导体器件在功函数层中由不同的材料形成。 实施例包括在衬底上形成第一和第二可移除栅极，分别在第一和第二可移除栅极的相对侧上形成第一和第二对间隔物，在第二可移除栅极上形成硬掩模层，去除第一可移除栅极， 在所述第一对间隔件之间形成第一空腔，在所述第一空腔中形成第一功函数材料，去除所述硬掩模层和所述第二可移除栅极，在所述第二对间隔件之间形成第二空腔，形成第二功函数材料， 从第一功能材料，在第二腔。

公开(公告)号：US20130015532A1

公开(公告)日：2013-01-17

申请号：US13182614

申请日：2011-07-14

申请人： Ju Youn Kim ,  Jedon Kim

发明人： Ju Youn Kim ,  Jedon Kim

IPC分类号： H01L29/772 ,  H01L21/28

CPC分类号： H01L29/66545 ,  H01L21/28088 ,  H01L21/28518 ,  H01L21/76897 ,  H01L21/82345 ,  H01L21/823842 ,  H01L27/0629 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/665

摘要： A method for manufacturing a semiconductor device, comprising forming a metal gate of a transistor on a substrate by a replacement metal gate process, wherein an insulating layer is formed on the substrate adjacent the metal gate, forming a hard mask on the substrate including the insulating layer and the metal gate, the hard mask including an opening exposing the metal gate, performing a metal pull back process on the substrate to remove a predetermined depth of a top portion of the metal gate, depositing a protective layer on the substrate, including on the hard mask and on top of a remaining portion of the metal gate, and performing chemical mechanical polishing to remove the hard mask and the protective layer, wherein the protective layer formed on top of the remaining portion of the metal gate remains.

摘要翻译： 一种制造半导体器件的方法，包括通过替换金属栅极工艺在衬底上形成晶体管的金属栅极，其中在与金属栅极相邻的衬底上形成绝缘层，在包括绝缘体的衬底上形成硬掩模 层和金属栅极，硬掩模包括暴露金属栅极的开口，在基板上执行金属拉回处理以去除金属栅极的顶部的预定深度，在基板上沉积保护层，包括在 硬掩模和金属栅极的剩余部分的顶部，并进行化学机械抛光以去除硬掩模和保护层，其中形成在金属栅极的剩余部分顶部的保护层保留。

公开(公告)号：US20130015530A1

公开(公告)日：2013-01-17

申请号：US13181542

申请日：2011-07-13

申请人： JU YOUN KIM ,  Jedon Kim

发明人： JU YOUN KIM ,  Jedon Kim

IPC分类号： H01L21/20 ,  H01L27/06

CPC分类号： H01L28/20 ,  H01L21/82345 ,  H01L21/823842 ,  H01L27/0629

摘要： A method for manufacturing a semiconductor device, comprising forming a first gate stack portion on a substrate, the first gate stack portion including a first gate oxide layer and a first polysilicon layer on the first gate oxide layer, forming a second gate stack portion on the substrate, the second gate stack portion including a second gate oxide layer and a second polysilicon layer on the second gate oxide layer, forming a resistor portion on the substrate, the resistor portion including a third gate oxide layer and a third polysilicon layer on the third gate oxide layer, covering the resistor portion with a photoresist, removing respective first portions of the first and second polysilicon layers from the first and second gate stack portions, removing the photoresist from the resistor portion, and after removing the photoresist from the resistor portion, removing respective remaining portions of the first and second polysilicon layers from the first and second gate stack portions.

摘要翻译： 一种制造半导体器件的方法，包括在衬底上形成第一栅极叠层部分，所述第一栅叠层部分包括在所述第一栅极氧化物层上的第一栅极氧化物层和第一多晶硅层，在所述第一栅极堆叠部分上形成第二栅极叠层部分 衬底，所述第二栅堆叠部分包括在所述第二栅极氧化物层上的第二栅极氧化物层和第二多晶硅层，在所述衬底上形成电阻器部分，所述电阻器部分包括第三栅极氧化物层和第三多晶硅层， 栅极氧化物层，用光致抗蚀剂覆盖电阻器部分，从第一和第二栅极堆叠部分去除第一和第二多晶硅层的相应的第一部分，从电阻器部分去除光致抗蚀剂，并且在从电阻器部分去除光致抗蚀剂之后， 从第一和第二栅堆叠部分去除第一和第二多晶硅层的各个剩余部分。

公开(公告)号：US08772165B2

公开(公告)日：2014-07-08

申请号：US13182614

申请日：2011-07-14

申请人： Ju Youn Kim ,  Jedon Kim

发明人： Ju Youn Kim ,  Jedon Kim

IPC分类号： H01L21/461 ,  H01L29/66

CPC分类号： H01L29/66545 ,  H01L21/28088 ,  H01L21/28518 ,  H01L21/76897 ,  H01L21/82345 ,  H01L21/823842 ,  H01L27/0629 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/665

摘要： A method for manufacturing a semiconductor device, comprising forming a metal gate of a transistor on a substrate by a replacement metal gate process, wherein an insulating layer is formed on the substrate adjacent the metal gate, forming a hard mask on the substrate including the insulating layer and the metal gate, the hard mask including an opening exposing the metal gate, performing a metal pull back process on the substrate to remove a predetermined depth of a top portion of the metal gate, depositing a protective layer on the substrate, including on the hard mask and on top of a remaining portion of the metal gate, and performing chemical mechanical polishing to remove the hard mask and the protective layer, wherein the protective layer formed on top of the remaining portion of the metal gate remains.

摘要翻译： 一种制造半导体器件的方法，包括通过替换金属栅极工艺在衬底上形成晶体管的金属栅极，其中在与金属栅极相邻的衬底上形成绝缘层，在包括绝缘体的衬底上形成硬掩模 层和金属栅极，硬掩模包括暴露金属栅极的开口，在基板上执行金属拉回处理以去除金属栅极的顶部的预定深度，在基板上沉积保护层，包括在 硬掩模和金属栅极的剩余部分的顶部，并进行化学机械抛光以去除硬掩模和保护层，其中形成在金属栅极的剩余部分顶部的保护层保留。

公开(公告)号：US08592281B2

公开(公告)日：2013-11-26

申请号：US13182594

申请日：2011-07-14

申请人： Ju Youn Kim ,  Jedon Kim

发明人： Ju Youn Kim ,  Jedon Kim

IPC分类号： H01L21/20

CPC分类号： H01L28/20 ,  H01L21/28123 ,  H01L21/82345 ,  H01L21/823481 ,  H01L21/823842 ,  H01L21/823878 ,  H01L27/0629 ,  H01L29/165 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/7833 ,  H01L29/7843

摘要： A method for manufacturing a semiconductor device, comprising forming a first gate stack portion on a surface of a substrate, the first gate stack portion including a first gate oxide layer and a first polysilicon layer on the first gate oxide layer, forming a second gate stack portion on the surface of the substrate, the second gate stack portion including a second gate oxide layer and a second polysilicon layer on the second gate oxide layer, forming a resistor portion in a recessed portion of the substrate below the surface of the substrate, the resistor portion including a third polysilicon layer, and removing the first and second polysilicon layers from the first and second gate stack portions to expose the first and second gate oxide layers, wherein at least one of a dielectric layer and a stress liner cover a top surface of the resistor portion during removal of the first and second polysilicon layers.

摘要翻译： 一种制造半导体器件的方法，包括在衬底的表面上形成第一栅极叠层部分，所述第一栅极堆叠部分包括第一栅极氧化物层和第一栅极氧化物层上的第一多晶硅层，形成第二栅极堆叠 所述第二栅叠层部分包括在所述第二栅极氧化物层上的第二栅极氧化物层和第二多晶硅层，在所述衬底的所述衬底的表面下方的凹陷部分中形成电阻器部分， 电阻器部分，其包括第三多晶硅层，以及从所述第一和第二栅极堆叠部分去除所述第一和第二多晶硅层以暴露所述第一和第二栅极氧化物层，其中介电层和应力衬里中的至少一个覆盖顶表面 在去除第一和第二多晶硅层期间的电阻器部分。