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公开(公告)号：US5467473A
公开(公告)日：1995-11-14
申请号：US1976
申请日：1993-01-08
申请人： James A. Kahle , Chin-Cheng Kau
发明人： James A. Kahle , Chin-Cheng Kau
IPC分类号： G06F9/38
CPC分类号： G06F9/3834
摘要： A processing system allows for out of order instruction execution and includes at least one load/store unit for loading instructions to a register for processing by a fixed point unit, floating point unit, or the like, and store the results to memory. A load queue maintains the addresses and program numbers of the load instructions. During execution the address of the store instruction is compared to the address in the load queue of previously executed load instructions. A program counter compares the program number of the store instruction with the program number of the load instruction in the load queue. If the addresses are different, then no impermissible out of order situation exists between the load and store instructions being compared, because the data is not at the same address. If the address is the same, and the store program number is greater than the load program number, then the instructions have been executed in order (the load correctly preceded the store) and no problem exists. However, if the addresses are the same and the load instruction has been incorrectly reordered to precede the store instruction, then a reordering conflict exists and the load instructions must be re-executed.
摘要翻译： 处理系统允许执行不一致的指令，并且包括至少一个加载/存储单元，用于将指令加载到寄存器以由固定点单元，浮点单元等进行处理，并将结果存储到存储器中。 加载队列维护加载指令的地址和程序号。 在执行期间，将存储指令的地址与先前执行的加载指令的加载队列中的地址进行比较。 程序计数器将存储指令的程序号与加载队列中的加载指令的程序号进行比较。 如果地址不同，那么由于数据不在相同的地址，所以在被比较的加载和存储指令之间不存在无序的情况。 如果地址相同，并且存储程序号大于加载程序号，则指令已按顺序执行（加载正确存储在存储之前），并且不存在问题。 然而，如果地址相同并且加载指令已被错误地重新排序到存储指令之前，则存在重新排序冲突，并且必须重新执行加载指令。
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2.发明授权Method and system for single cycle dispatch of multiple instructions in a superscalar processor system 失效用于超标量处理器系统中多个指令的单周期调度的方法和系统
公开(公告)号：US5465373A
公开(公告)日：1995-11-07
申请号：US1864
申请日：1993-01-08
申请人： James A. Kahle , Chin-Cheng Kau , David S. Levitan , Aubrey D. Ogden , Ali A. Poursepanj , Paul K.-G. Tu , Donald E. Waldecker
发明人： James A. Kahle , Chin-Cheng Kau , David S. Levitan , Aubrey D. Ogden , Ali A. Poursepanj , Paul K.-G. Tu , Donald E. Waldecker
IPC分类号： G06F9/38
CPC分类号： G06F9/3836 , G06F9/384
摘要： A method and system for permitting single cycle instruction dispatch in a superscalar processor system which dispatches multiple instructions simultaneously to a group of execution units for execution and placement of results thereof within specified general purpose registers. Each instruction generally includes at least one source operand and one destination operand. A plurality of intermediate storage buffers are provided and each time an instruction is dispatched to an available execution unit, a particular one of the intermediate storage buffers is assigned to any destination operand within the dispatched instruction, permitting the instruction to be dispatched within a single cycle by eliminating any requirement for determining and selecting the specified general purpose register or a designated alternate general purpose register.
摘要翻译： 一种用于在超标量处理器系统中允许单周期指令调度的方法和系统，其将多个指令同时分配到一组执行单元以执行并将其结果放置在指定的通用寄存器内。 每个指令通常包括至少一个源操作数和一个目的操作数。 提供多个中间存储缓冲器，并且每当将指令分派到可用执行单元时，中间存储缓冲器中的特定一个被分配给调度指令内的任何目的地操作数，允许在单个周期内发送指令 通过消除对确定和选择指定的通用寄存器或指定的备用通用寄存器的任何要求。
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公开(公告)号：US20140047060A1
公开(公告)日：2014-02-13
申请号：US13570916
申请日：2012-08-09
申请人： Dong Chen , Noel A. Eisley , Philip Heidelberger , James A. Kahle , Fabrizio Petrini , Robert M. Senger , Burkhard Steinmacher-Burow , Yutaka Sugawara
发明人： Dong Chen , Noel A. Eisley , Philip Heidelberger , James A. Kahle , Fabrizio Petrini , Robert M. Senger , Burkhard Steinmacher-Burow , Yutaka Sugawara
IPC分类号： G06F15/167
CPC分类号： G06F9/547 , H04L29/0617 , H04L67/40
摘要： According to one embodiment of the present invention, a system for operating memory includes a first node coupled to a second node by a network, the system configured to perform a method including receiving the remote transaction message from the second node in a processing element in the first node via the network, wherein the remote transaction message bypasses a main processor in the first node as it is transmitted to the processing element. In addition, the method includes accessing, by the processing element, data from a location in a memory in the first node based on the remote transaction message, and performing, by the processing element, computations based on the data and the remote transaction message.
摘要翻译： 根据本发明的一个实施例，一种用于操作存储器的系统包括由网络耦合到第二节点的第一节点，所述系统被配置为执行一种方法，该方法包括从所述第二节点接收来自所述第二节点的处理元件中的所述远程事务消息 第一节点经由网络，其中当所述远程事务消息被传送到所述处理元件时，所述远程事务消息绕过所述第一节点中的主处理器。 此外，该方法包括基于远程事务消息，由处理元件访问来自第一节点中的存储器中的位置的数据，以及由处理元件基于数据和远程事务消息执行计算。
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公开(公告)号：US09197920B2
公开(公告)日：2015-11-24
申请号：US12903840
申请日：2010-10-13
IPC分类号： G06F15/16 , H04N21/422 , G06Q50/00 , H04N21/4788 , H04N21/43 , H04N21/45 , H04N21/462 , H04N21/81 , H04N21/441
CPC分类号： H04N21/42203 , G06Q50/01 , H04N21/4307 , H04N21/441 , H04N21/4532 , H04N21/4622 , H04N21/4788 , H04N21/8106
摘要： Embodiments of the present invention provide a method, system and computer program product for providing a shared user experience during media playback. In an embodiment of the invention, a method for providing a shared user experience during media playback is provided. The method includes selecting for a particular user a media file for playback in a media player executing in memory by a processor of a computer. The method also includes retrieving a shared user experience audio file recorded for a different user during a previous playback of the selected media file. Finally, the method includes playing back for the particular user both the selected media file and the retrieved shared user experience audio file concurrently in the media player.
摘要翻译： 本发明的实施例提供了一种用于在媒体播放期间提供共享用户体验的方法，系统和计算机程序产品。 在本发明的实施例中，提供了一种用于在媒体回放期间提供共享用户体验的方法。 该方法包括为特定用户选择一种媒体文件，用于在由计算机的处理器在存储器中执行的媒体播放器中回放。 该方法还包括在所选择的媒体文件的先前播放期间检索为不同用户记录的共享用户体验音频文件。 最后，该方法包括在媒体播放器中同时播放所选择的媒体文件和检索到的共享用户体验音频文件的特定用户。
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公开(公告)号：US20130290473A1
公开(公告)日：2013-10-31
申请号：US13584323
申请日：2012-08-13
申请人： Dong Chen , Noel A. Eisley , Philip Heidelberger , James A. Kahle , Fabrizio Petrini , Robert M. Senger , Burkhard Steinmacher-Burow , Yutaka Sugawara
发明人： Dong Chen , Noel A. Eisley , Philip Heidelberger , James A. Kahle , Fabrizio Petrini , Robert M. Senger , Burkhard Steinmacher-Burow , Yutaka Sugawara
IPC分类号： G06F15/167
CPC分类号： G06F15/17331 , G06F9/544 , H04L29/0617 , H04L67/1097
摘要： According to one embodiment of the present invention, a system for operating memory includes a first node coupled to a second node by a network, the system configured to perform a method including receiving the remote transaction message from the second node in a processing element in the first node via the network, wherein the remote transaction message bypasses a main processor in the first node as it is transmitted to the processing element. In addition, the method includes accessing, by the processing element, data from a location in a memory in the first node based on the remote transaction message, and performing, by the processing element, computations based on the data and the remote transaction message.
摘要翻译： 根据本发明的一个实施例，一种用于操作存储器的系统包括由网络耦合到第二节点的第一节点，所述系统被配置为执行一种方法，该方法包括从所述第二节点接收来自所述第二节点的处理元件中的所述远程事务消息 第一节点经由网络，其中当所述远程事务消息被传送到所述处理元件时，所述远程事务消息绕过所述第一节点中的主处理器。 此外，该方法包括基于远程事务消息，由处理元件访问来自第一节点中的存储器中的位置的数据，以及由处理元件基于数据和远程事务消息执行计算。
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公开(公告)号：US20120216004A1
公开(公告)日：2012-08-23
申请号：US13032737
申请日：2011-02-23
申请人： Christopher M. Abernathy , Mary D. Brown , Susan E. Eisen , James A. Kahle , Hung Q. Le , Dung Q. Nguyen
发明人： Christopher M. Abernathy , Mary D. Brown , Susan E. Eisen , James A. Kahle , Hung Q. Le , Dung Q. Nguyen
IPC分类号： G06F12/02
CPC分类号： G06F9/30101 , G06F9/30123 , G06F9/3013 , G06F9/384 , G06F9/3851 , G06F9/461
摘要： Various systems, processes, products, and techniques may be used to manage thread transitions. In particular implementations, a system and process for managing thread transitions may include the ability to determine that a transition is to be made regarding the relative use of two data register sets and determine, based on the transition determination, whether to move thread data in at least one of the data register sets to second-level registers. The system and process may also include the ability to move the thread data from at least one data register set to second-level registers based on the move determination.
摘要翻译： 可以使用各种系统，过程，产品和技术来管理线程转换。 在特定实现中，用于管理线程转换的系统和过程可以包括确定要对两个数据寄存器组的相对使用进行转换的能力，并且基于转换确定来确定是否将线程数据移入 至少一个数据寄存器设置为二级寄存器。 系统和过程还可以包括基于移动确定将线程数据从至少一个数据寄存器集合移动到第二级寄存器的能力。
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公开(公告)号：US09037669B2
公开(公告)日：2015-05-19
申请号：US13570916
申请日：2012-08-09
申请人： Dong Chen , Noel A. Eisley , Philip Heidelberger , James A. Kahle , Fabrizio Petrini , Robert M. Senger , Burkhard Steinmacher-Burow , Yutaka Sugawara
发明人： Dong Chen , Noel A. Eisley , Philip Heidelberger , James A. Kahle , Fabrizio Petrini , Robert M. Senger , Burkhard Steinmacher-Burow , Yutaka Sugawara
IPC分类号： G06F15/167 , G06F15/173 , G06F11/00 , G06F9/54 , H04L29/06
CPC分类号： G06F9/547 , H04L29/0617 , H04L67/40
摘要： According to one embodiment of the present invention, a system for operating memory includes a first node coupled to a second node by a network, the system configured to perform a method including receiving the remote transaction message from the second node in a processing element in the first node via the network, wherein the remote transaction message bypasses a main processor in the first node as it is transmitted to the processing element. In addition, the method includes accessing, by the processing element, data from a location in a memory in the first node based on the remote transaction message, and performing, by the processing element, computations based on the data and the remote transaction message.
摘要翻译： 根据本发明的一个实施例，一种用于操作存储器的系统包括由网络耦合到第二节点的第一节点，所述系统被配置为执行一种方法，该方法包括从所述第二节点接收来自所述第二节点的处理元件中的所述远程事务消息 第一节点经由网络，其中当所述远程事务消息被传送到所述处理元件时，所述远程事务消息绕过所述第一节点中的主处理器。 此外，该方法包括基于远程事务消息，由处理元件访问来自第一节点中的存储器中的位置的数据，以及由处理元件基于数据和远程事务消息执行计算。
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公开(公告)号：US08725993B2
公开(公告)日：2014-05-13
申请号：US13032737
申请日：2011-02-23
申请人： Christopher M. Abernathy , Mary D. Brown , Susan E. Eisen , James A. Kahle , Hung Q. Le , Dung Q. Nguyen
发明人： Christopher M. Abernathy , Mary D. Brown , Susan E. Eisen , James A. Kahle , Hung Q. Le , Dung Q. Nguyen
CPC分类号： G06F9/30101 , G06F9/30123 , G06F9/3013 , G06F9/384 , G06F9/3851 , G06F9/461
摘要： Various systems, processes, products, and techniques may be used to manage thread transitions. In particular implementations, a system and process for managing thread transitions may include the ability to determine that a transition is to be made regarding the relative use of two data register sets and determine, based on the transition determination, whether to move thread data in at least one of the data register sets to second-level registers. The system and process may also include the ability to move the thread data from at least one data register set to second-level registers based on the move determination.
摘要翻译： 可以使用各种系统，过程，产品和技术来管理线程转换。 在特定实现中，用于管理线程转换的系统和过程可以包括确定要对两个数据寄存器组的相对使用进行转换的能力，并且基于转换确定来确定是否将线程数据移入 至少一个数据寄存器设置为二级寄存器。 系统和过程还可以包括基于移动确定将线程数据从至少一个数据寄存器集合移动到第二级寄存器的能力。
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公开(公告)号：US20120096084A1
公开(公告)日：2012-04-19
申请号：US12903840
申请日：2010-10-13
IPC分类号： G06F15/16
CPC分类号： H04N21/42203 , G06Q50/01 , H04N21/4307 , H04N21/441 , H04N21/4532 , H04N21/4622 , H04N21/4788 , H04N21/8106
摘要： Embodiments of the present invention provide a method, system and computer program product for providing a shared user experience during media playback. In an embodiment of the invention, a method for providing a shared user experience during media playback is provided. The method includes selecting for a particular user a media file for playback in a media player executing in memory by a processor of a computer. The method also includes retrieving a shared user experience audio file recorded for a different user during a previous playback of the selected media file. Finally, the method includes playing back for the particular user both the selected media file and the retrieved shared user experience audio file concurrently in the media player.
摘要翻译： 本发明的实施例提供了一种用于在媒体播放期间提供共享用户体验的方法，系统和计算机程序产品。 在本发明的实施例中，提供了一种用于在媒体回放期间提供共享用户体验的方法。 该方法包括为特定用户选择一种媒体文件，用于在由计算机的处理器在存储器中执行的媒体播放器中回放。 该方法还包括在所选择的媒体文件的先前播放期间检索为不同用户记录的共享用户体验音频文件。 最后，该方法包括在媒体播放器中同时播放所选择的媒体文件和检索到的共享用户体验音频文件的特定用户。
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10.发明授权
公开(公告)号：US5867684A
公开(公告)日：1999-02-02
申请号：US873013
申请日：1997-06-11
CPC分类号： G06F9/30043 , G06F9/3824 , G06F9/3834 , G06F9/3838
摘要： A method and device of executing a load multiple instruction in a superscaler microprocessor is provided. The method comprises the steps of dispatching a load multiple instruction to a load/store unit, wherein the load/store unit begins execution of a dispatched load multiple instruction, and wherein the load multiple instruction loads data from memory into a plurality of registers. The method further includes the step of maintaining a table that lists each register of the plurality of registers and that indicates when data has been loaded into each register by the executing load multiple instruction. The method concludes by executing an instruction that is dependent upon source operand data loaded by the load multiple instruction into a register of the plurality of registers indicated by the instruction as a source register, prior to the load multiple instruction completing its execution, when the table indicates the source operand data has been loaded into the source register. Also, according to the present invention, a method of executing a store multiple instruction in a superscaler microprocessor is provided. This method comprises the steps of dispatching a store multiple instruction to a load/store unit, whereupon the load/store unit begins executing the store multiple instruction, wherein the load store instruction stores data from a plurality of registers to memory; and executing a fixed point instruction that is dependent upon data being stored by the store multiple instruction from a register of the plurality of registers indicated by the fixed point instruction as a source register, prior to the store multiple instruction completing its execution, but prohibiting the executing fixed point instruction from writing to a register of the plurality of registers prior to the store multiple instruction completing.
摘要翻译： 提供了一种在超标量微处理器中执行加载多指令的方法和装置。 该方法包括以下步骤：向加载/存储单元发送加载多个指令，其中加载/存储单元开始执行分派的加载多个指令，并且其中加载多个指令将数据从存储器加载到多个寄存器中。 该方法还包括维护列出多个寄存器的每个寄存器并且通过执行加载多个指令指示何时将数据加载到每个寄存器中的表的步骤。 该方法通过在载入多个指令完成其执行之前执行依赖于由加载多个指令加载的源操作数数据到由指令指示的多个寄存器的寄存器中作为源寄存器的指令，当该表 表示源操作数数据已加载到源寄存器中。 此外，根据本发明，提供了一种在超标量微处理器中执行存储多重指令的方法。 该方法包括以下步骤：将存储多重指令分派到加载/存储单元，从而加载/存储单元开始执行存储多指令，其中加载存储指令将数据从多个寄存器存储到存储器; 并且在存储多个指令完成其执行之前，执行依赖于由所述固定点指令指示的多个寄存器的寄存器作为源寄存器的存储多个指令存储的数据的固定点指令，但是禁止 在存储多个指令完成之前，从写入到多个寄存器的寄存器执行固定点指令。
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