Integrated relay ladder language, reduced instruction set computer
    6.
    发明授权
    Integrated relay ladder language, reduced instruction set computer 失效
    集成式梯形图语言,精简指令集电脑

    公开(公告)号:US6018797A

    公开(公告)日:2000-01-25

    申请号:US987033

    申请日:1997-12-09

    IPC分类号: G06F15/78

    摘要: An integrated RISC and relay ladder logic processor uses shared registers, program counter, bus lines, and processing circuitry to eliminate delays associated with transfer of control in co-processor type architecture. The RISC instructions do not significantly interfere with the specialized hardware needed for rapid relay logic execution, the latter which may be further improved through the use of a pipeline well suited for relay ladder logic which creates few pipeline hazards. Two levels of condition codes are used for the arithmetic and logic instructions to permit nested arithmetic operations without interference with those instructions visible to the user. Hybrid instructions are provided to synchronize the relay ladder instructions with the arithmetic instructions, thus truly integrating the two instruction sets.

    摘要翻译: 集成RISC和继电器梯形图逻辑处理器使用共享寄存器,程序计数器,总线和处理电路来消除与协处理器类型架构中的控制传输相关的延迟。 RISC指令不会显着干扰快速继电器逻辑执行所需的专用硬件,后者可通过使用非常适合于创建少量管道危险的梯形图梯形逻辑的管道进一步改进。 用于算术和逻辑指令的两个级别的条件代码允许嵌套算术运算,而不会干扰用户可见的那些指令。 提供混合指令以使梯形图指令与算术指令同步,从而真正集成两个指令集。

    Fault handling with loaded functions
    7.
    发明授权
    Fault handling with loaded functions 失效
    带加载功能的故障处理

    公开(公告)号:US5812759A

    公开(公告)日:1998-09-22

    申请号:US744911

    申请日:1996-11-08

    申请人: Jeffery W. Brooks

    发明人: Jeffery W. Brooks

    IPC分类号: G06F11/07 G06F11/00 G06F11/30

    CPC分类号: G06F11/0775

    摘要: A method of handling a fault which occurs during execution of an executable program comprises the steps of designating a first sequence of instructions of the executable program as visible and designating a second sequence of instructions of the executable program as invisible. According to this scheme, for the first visible sequence of instructions, faults are reported in a manner which designates an instruction at which the fault occurred. For the second invisible sequence of instructions, faults are reported in a manner which designates the invisible sequence of instructions as a whole. The invention permits fault handling for instructions added by a user to be performed in the same way as fault handling for built-in functions, and is usable with compiled machines.

    摘要翻译: 处理执行可执行程序期间发生的故障的方法包括以下步骤:将可执行程序的第一指令序列指定为可见,并将可执行程序的第二指令序列指定为不可见。 根据该方案,对于第一可见指令序列,以指定故障发生的指令的方式报告故障。 对于第二个不可见的指令序列,以指定整个指令的不可见序列的方式报告故障。 本发明允许以与内置功能的故障处理相同的方式执行用户添加的指令的故障处理,并且可与编译的机器一起使用。

    Industrial controller compiler with expandable instruction set
    8.
    发明授权
    Industrial controller compiler with expandable instruction set 失效
    具有扩展指令集的工业控制器编译器

    公开(公告)号:US5819097A

    公开(公告)日:1998-10-06

    申请号:US762232

    申请日:1996-12-09

    IPC分类号: G06F9/45 G06F9/44 G06F9/30

    CPC分类号: G06F8/447

    摘要: A compiler for an industrial controller uses a user modifiable instruction table to contain code fragments necessary to compile particular instructions. During compilation, the instructions are replaced with the code fragments. Thus new instructions recognizable by the compiler may be added simply by editing this instruction table. Multiple instructions having the same name are resolved through a best match of operand types which examines the possible data loss in conversion of operand types to select a particular one of the instructions.

    摘要翻译: 工业控制器的编译器使用用户可修改的指令表来包含编译特定指令所需的代码段。 在编译期间,指令将被代码片段替代。 因此,可以通过编辑该指令表来简单地添加编译器可识别的新指令。 具有相同名称的多个指令通过操作数类型的最佳匹配来解析,该操作数类型检查操作数类型转换中可能的数据丢失以选择特定的指令。

    Systems and methods that facilitate motion control through coordinate system transformations
    9.
    发明授权
    Systems and methods that facilitate motion control through coordinate system transformations 有权
    通过坐标系变换促进运动控制的系统和方法

    公开(公告)号:US07266425B2

    公开(公告)日:2007-09-04

    申请号:US10955068

    申请日:2004-09-30

    IPC分类号: G05B19/04 G06F19/00 G05B19/39

    摘要: The subject invention relates to systems and methods that facilitate motion between different coordinate systems in an industrial control environment. The systems and methods accept data in one coordinate system and transform the data to a different coordinate system. Suitable transformations include instructions that transform between Cartesian, pre-defined non-Cartesian, and user-defined non-Cartesian coordinate systems, including transformations between a non-Cartesian coordinate system to another non-Cartesian coordinate system. Such transformations can be programmed in essentially any industrial control language and can be seamlessly integrated with the control environment. The systems and methods can be utilized to generate a motion instruction that includes, among other information, source and target coordinate systems and the transformation between them. The subject invention provides for connecting various systems together through respective motion instructions, wherein a motion of a source system is mapped to a coordinate system of a target system and the target system is moved accordingly.

    摘要翻译: 本发明涉及在工业控制环境中促进不同坐标系之间运动的系统和方法。 系统和方法接受一个坐标系统中的数据,并将数据转换为不同的坐标系。 合适的变换包括在笛卡尔坐标,预定义非笛卡尔坐标系和用户定义的非笛卡尔坐标系之间进行变换的指令,包括非笛卡尔坐标系与非笛卡尔坐标系之间的转换。 这样的转换可以基本上以任何工业控制语言编程,并且可以与控制环境无缝集成。 系统和方法可用于生成运动指令,其中包括源和目标坐标系以及它们之间的转换等信息。 本发明提供通过相应的运动指令将各种系统连接在一起,其中源系统的运动被映射到目标系统的坐标系,并且目标系统相应地移动。

    Programmable controller with ladder diagram macro instructions
    10.
    发明授权
    Programmable controller with ladder diagram macro instructions 失效
    可编程控制器,带梯形图宏指令

    公开(公告)号:US5295059A

    公开(公告)日:1994-03-15

    申请号:US942254

    申请日:1992-09-09

    IPC分类号: G05B19/05 G06F15/46 G05B19/00

    摘要: A machine is operated by a programmable controller that executes a ladder logic control program. A custom ladder logic processor is provided for high speed execution of the more common ladder logic instructions and a microprocessor interprets the remaining ladder logic instructions. A first section of memory contains a ladder logic control program in which some of the instructions are macro instructions executable by the ladder logic processor. Each macro instruction specifies an operation code, a first memory file containing data to be processed by the macro instruction, a second memory file containing control data governing the processing, and a storage location for results produced by execution of the macro instruction. Another memory section stores a library file containing a ladder logic software routine for each macro instruction, and stores a directory which identifies a starting location of the macro instruction routine for each operation code. When a macro instruction is encountered in the control program, the corresponding ladder logic software routine is executed. During the execution of the routine data is obtained from the first memory file and the results are placed in the storage location. At the completion of the ladder logic software routine, execution of the control program resumes.

    摘要翻译: 机器由执行梯形图逻辑控制程序的可编程控制器操作。 提供了一种定制的梯形逻辑处理器,用于高速执行更常见的梯形图逻辑指令,并且微处理器解释剩余的梯形图逻辑指令。 存储器的第一部分包含梯形逻辑控制程序,其中一些指令是可由梯形逻辑处理器执行的宏指令。 每个宏指令指定操作代码,包含要由宏指令处理的数据的第一存储器文件,包含控制该处理的控制数据的第二存储器文件以及由执行宏指令产生的结果的存储位置。 另一个存储器部分存储包含用于每个宏指令的梯形逻辑软件程序的库文件,并存储标识每个操作代码的宏指令例程的起始位置的目录。 当在控制程序中遇到宏指令时,执行相应的梯形图逻辑软件程序。 在执行例程数据期间,从第一个存储器文件获得并将结果放在存储位置。 在梯形逻辑软件程序完成后,控制程序的执行恢复。