Methods and apparatus for testing electronic circuits

    公开(公告)号:US07148717B2

    公开(公告)日:2006-12-12

    申请号:US10900915

    申请日:2004-07-28

    IPC分类号: G01R31/26

    摘要: Methods and apparatus are provided for testing to determine the existence of defects and faults in circuits, devices, and systems such as digital integrated circuits, SRAM memory, mixed signal circuits, and the like. In particular, methods and apparatus are provided for detecting faults in circuits, devices, and systems using input control signals to generate controlled-duration, controlled pulse-width, transient power supply currents in a device under test, where said transient power supply currents are of controllable bandwidth and can be used as observables to determine faulty or defective operation. Additionally, methods and apparatus are provided to permit high bandwidth sensing of transient supply currents as need to preserve the narrow widths of these current pulses. These methods may include autozero techniques to remove supply current leakage current and DC offsets associated with practical current sensing currents. The sensed transient supply currents can be compared to single or multiple thresholds to assess normal or faulty or defective operation of the device under test.

    Amplitude and rise-time sensitive timing-shaping filters with built-in pulse-tail cancellation for high count-rate operation
    4.
    发明授权
    Amplitude and rise-time sensitive timing-shaping filters with built-in pulse-tail cancellation for high count-rate operation 有权
    幅度和上升时间敏感的定时整形滤波器,具有内置的脉冲尾部取消功能,可实现高计数率操作

    公开(公告)号:US06822506B2

    公开(公告)日:2004-11-23

    申请号:US10418446

    申请日:2003-04-17

    申请人: David M. Binkley

    发明人: David M. Binkley

    IPC分类号: H03F3191

    CPC分类号: H03K5/1536 H03K5/007

    摘要: A continuous-time baseline restoration (BLR) circuit providing built-in pulse tail-cancellation, or BLR tail-cancel circuit, in constant fraction discriminator (CFD) arming and timing circuits. The BLR tail cancel circuit is applied at the output of constant fraction timing shaping filters and arming circuits to permit monolithic integrated circuit implementation of CFD circuits operating at high input signal count rates. The BLR tail-cancel circuit provides correction of dc offset and count-rate dependent baseline errors along with simultaneous tail-cancellation. Correction of dc offsets due to electronic device mismatches and count-rate dependent baseline errors is required for accurate time pickoff from the input signals. The reduction of pulse width, or pulse tail-cancellation is required to shorten the duration of high count rate signals to prevent the severe distortion caused by the occurrence a new signal superimposed on the tails of previous signals, a condition known as pulse pileup. Without pulse tail-cancellation, there are substantial errors in time pickoff due to the pulse pileup.

    摘要翻译: 在恒定分数鉴别器(CFD)布防和定时电路中提供内置脉冲尾部消除或BLR尾部消除电路的连续时间基线恢复(BLR)电路。 BLR尾消除电路应用于恒定分数定时整形滤波器和布防电路的输出,以允许以高输入信号计数速率工作的CFD电路的单片集成电路实现。 BLR尾部消除电路提供直流偏移和计数率依赖基线误差的校正以及同时的尾部消除。 由于输入信号的精确时间检测,需要校正由于电子设备不匹配引起的直流偏移和计数速率相关的基线误差。 需要减小脉冲宽度或脉冲尾部消除以缩短高计数率信号的持续时间,以防止由于先前信号的尾部叠加的新信号引起的严重失真,称为脉冲堆积。 没有脉冲尾部消除,由于脉冲堆积,在时间检测方面存在实质性的错误。

    Methods And Apparatus For Testing Electronic Circuits
    5.
    发明申请
    Methods And Apparatus For Testing Electronic Circuits 审中-公开
    电子电路测试方法与装置

    公开(公告)号:US20100097073A1

    公开(公告)日:2010-04-22

    申请号:US12644804

    申请日:2009-12-22

    IPC分类号: G01R31/02

    摘要: Methods and apparatus are provided for testing to determine the existence of defects and faults in circuits, devices, and systems such as digital integrated circuits, SRAM memory, mixed signal circuits, and the like. In particular, methods and apparatus are provided for detecting faults in circuits, devices, and systems using input control signals to generate controlled-duration, controlled pulse-width, transient power supply currents in a device under test, where said transient power supply currents are of controllable bandwidth and can be used as observables to determine faulty or defective operation. Additionally, methods and apparatus are provided to permit high bandwidth sensing of transient supply currents as need to preserve the narrow widths of these current pulses. These methods may include autozero techniques to remove supply current leakage current and DC offsets associated with practical current sensing currents. The sensed transient supply currents can be compared to single or multiple thresholds to assess normal or faulty or defective operation of the device under test.

    摘要翻译: 提供了用于测试以确定诸如数字集成电路,SRAM存储器,混合信号电路等的电路,设备和系统中的缺陷和故障的存在的方法和装置。 特别地,提供了用于检测电路,设备和系统中的故障的方法和装置,其使用输入控制信号来产生被测器件中的受控持续时间,受控的脉冲宽度,瞬时电源电流,其中所述瞬态电源电流 可控带宽,并可用作可观察的来确定故障或故障的操作。 此外,提供方法和装置以允许对瞬态电源电流的高带宽感测,因为需要保留这些电流脉冲的窄宽度。 这些方法可以包括用于去除与实际电流感测电流相关联的电源电流泄漏电流和DC偏移的自动归零技术。 感测到的瞬态电源电流可以与单个或多个阈值进行比较,以评估被测器件的正常或故障或故障操作。

    Remote gain control circuit for photomultiplier tubes
    6.
    发明授权
    Remote gain control circuit for photomultiplier tubes 失效
    用于光电倍增管的远程增益控制电路

    公开(公告)号:US5367222A

    公开(公告)日:1994-11-22

    申请号:US69773

    申请日:1993-06-01

    申请人: David M. Binkley

    发明人: David M. Binkley

    IPC分类号: H01J43/30 H01J29/41

    CPC分类号: H01J43/30

    摘要: A gain control circuit (10) for remotely controlling the gain of a photomultiplier tube (PMT (12)). The remote gain control circuit (10) may be used with a PMT (12) having any selected number of dynodes (DY). The remote gain control circuit (10) is connected to the last dynode nearest the anode (16) in the dynode string which controls the total dynode supply voltage and influences the gain of each dynode (DY). The remote gain control circuit (10) of the present invention includes an integrated-circuit operational amplifier (U1), a high-voltage transistor (Q1), a plurality of resistors (R), a plurality of capacitors (C), and a plurality of diodes (D). Negative feedback is used to set the last dynode voltage proportional to a voltage controlled by the gain control voltage delivered by a voltage source such as a digital-to-analog converter. The control circuit (10) of the present invention is connected to the last dynode using a single connecting wire (22).

    摘要翻译: 一种用于远程控制光电倍增管(PMT(12))的增益的增益控制电路(10)。 远程增益控制电路(10)可以与具有任何选定数量的倍增电极(DY)的PMT(12)一起使用。 遥控增益控制电路(10)连接到最大倍增电极,最后一个倍增电极(16)最靠近负极(16),控制总的倍增极电源电压并影响每个倍增电极(DY)的增益。 本发明的远程增益控制电路(10)包括集成电路运算放大器(U1),高压晶体管(Q1),多个电阻器(R),多个电容器(C)和 多个二极管(D)。 负反馈用于设置与由诸如数模转换器之类的电压源传送的增益控制电压控制的电压成比例的最后倍增电压。 本发明的控制电路(10)使用单个连接线(22)连接到最后的倍增电极。

    Methods and apparatus for testing electronic circuits
    7.
    发明授权
    Methods and apparatus for testing electronic circuits 失效
    电子电路测试方法和设备

    公开(公告)号:US07710140B2

    公开(公告)日:2010-05-04

    申请号:US11593655

    申请日:2006-11-07

    IPC分类号: G01R31/26

    摘要: Methods and apparatus are provided for testing to determine the existence of defects and faults in circuits, devices, and systems such as digital integrated circuits, SRAM memory, mixed signal circuits, and the like. In particular, methods and apparatus are provided for detecting faults in circuits, devices, and systems using input control signals to generate controlled-duration, controlled pulse-width, transient power supply currents in a device under test, where said transient power supply currents are of controllable bandwidth and can be used as observables to determine faulty or defective operation. Additionally, methods and apparatus are provided to permit high bandwidth sensing of transient supply currents as need to preserve the narrow widths of these current pulses. These methods may include autozero techniques to remove supply current leakage current and DC offsets associated with practical current sensing currents. The sensed transient supply currents can be compared to single or multiple thresholds to assess normal or faulty or defective operation of the device under test.

    摘要翻译: 提供了用于测试以确定诸如数字集成电路,SRAM存储器,混合信号电路等的电路,设备和系统中的缺陷和故障的存在的方法和装置。 特别地,提供了用于检测电路,设备和系统中的故障的方法和装置,其使用输入控制信号来产生被测器件中的受控持续时间,受控的脉冲宽度,瞬时电源电流,其中所述瞬态电源电流 可控带宽,并可用作可观察的来确定故障或故障的操作。 此外,提供方法和装置以允许对瞬态电源电流的高带宽感测,因为需要保留这些电流脉冲的窄宽度。 这些方法可以包括用于去除与实际电流感测电流相关联的电源电流泄漏电流和DC偏移的自动归零技术。 感测到的瞬态电源电流可以与单个或多个阈值进行比较,以评估被测器件的正常或故障或故障操作。

    Methods and apparatus for testing electronic circuits
    8.
    发明授权
    Methods and apparatus for testing electronic circuits 失效
    电子电路测试方法和设备

    公开(公告)号:US06833724B2

    公开(公告)日:2004-12-21

    申请号:US10237670

    申请日:2002-09-10

    IPC分类号: G01R3126

    摘要: Methods and apparatus are provided for testing to determine the existence of defects and faults in circuits, devices, and systems such as digital integrated circuits, SRAM memory, mixed signal circuits, and the like. In particular, methods and apparatus are provided for detecting faults in circuits, devices, and systems using input control signals to generate controlled-duration, controlled pulse-width, transient power supply currents in a device under test, where said transient power supply currents are of controllable bandwidth and can be used as observables to determine faulty or defective operation. Additionally, methods and apparatus are provided to permit high bandwidth sensing of transient supply currents as need to preserve the narrow widths of these current pulses. These methods may include autozero techniques to remove supply current leakage current and DC offsets associated with practical current sensing currents. The sensed transient supply currents can be compared to single or multiple thresholds to assess normal or faulty or defective operation of the device under test.

    摘要翻译: 提供了用于测试以确定诸如数字集成电路,SRAM存储器,混合信号电路等的电路,设备和系统中的缺陷和故障的存在的方法和装置。 特别地,提供了用于检测电路,设备和系统中的故障的方法和装置,其使用输入控制信号来产生被测器件中的受控持续时间,受控的脉冲宽度,瞬时电源电流,其中所述瞬态电源电流 可控带宽,并可用作可观察的来确定故障或故障的操作。 此外,提供方法和装置以允许对瞬态电源电流的高带宽感测,因为需要保留这些电流脉冲的窄宽度。 这些方法可以包括用于去除与实际电流感测电流相关联的电源电流泄漏电流和DC偏移的自动归零技术。 感测到的瞬态电源电流可以与单个或多个阈值进行比较,以评估被测器件的正常或故障或故障操作。

    Amplitude-and rise-time-insensitive timing-shaping filters
    9.
    发明授权
    Amplitude-and rise-time-insensitive timing-shaping filters 失效
    幅度和上升时间不敏感的时序整形滤波器

    公开(公告)号:US5396187A

    公开(公告)日:1995-03-07

    申请号:US929687

    申请日:1992-08-13

    申请人: David M. Binkley

    发明人: David M. Binkley

    CPC分类号: H03K5/153 H03K5/13 H03K5/14

    摘要: An amplitude- and rise-time-insensitive timing-shaping filter (10) for converting a selected input signal into a bi-polar output signal having a zero-crossing point which is independent of the rise-time and amplitude of substantially linear-edge input signals, and which is amplitude insensitive for input signals of arbitrary fixed shapes. The amplitude- and rise-time-insensitive timing-shaping filter (10) includes an attenuator (14) for generating an attenuated signal, a delay path (12) for generating a delay signal, and a differencer (16) for subtracting the attenuated signal from the delayed signal. The delay path (12) of the present invention includes a low-pass filter of a selected order and configuration, an all-pass filter with a selected order and configuration, or an all-pass-low-pass filter combination for generating a delayed signal.

    摘要翻译: 一种用于将所选择的输入信号转换成具有过零点的双极输出信号的幅度和上升时间不敏感的定时整形滤波器(10),该过零点独立于基本线性边缘的上升时间和幅度 输入信号,对任意固定形状的输入信号幅度不敏感。 振幅和上升时间不敏感的定时整形滤波器(10)包括用于产生衰减信号的衰减器(14),用于产生延迟信号的延迟路径(12)和用于减去衰减信号的差分器(16) 来自延迟信号的信号。 本发明的延迟路径(12)包括所选顺序和配置的低通滤波器,具有所选顺序和配置的全通滤波器或全通低通滤波器组合,用于产生延迟 信号。