Reference voltage circuit
    1.
    发明授权
    Reference voltage circuit 失效
    参考电压电路

    公开(公告)号:US4359680A

    公开(公告)日:1982-11-16

    申请号:US278905

    申请日:1981-05-18

    IPC分类号: G05F3/20 H04M19/08

    CPC分类号: H04M19/08 G05F3/20

    摘要: A voltage reference circuit (10) produces a reference voltage at output terminals (66, 76). The output reference voltage is substantially independent of variations in the supply voltage, integrated circuit manufacturing processes and temperature. A current reference circuit (30, 32, 34, 36, 38, 56 and 84) produces constant emitter currents in bipolar transistors (40, 70). The V.sub.BE of the bipolar transistors (40, 70) is a stable reference due to the constant emitter current. The bipolar transistors (40, 70) are manufactured with similar geometries to eliminate dependence of the reference voltage upon bipolar processing variations. The V.sub.BE of the bipolar transistor (40) produces a reference current which is provided to the base terminal of bipolar transistor (70). The V.sub.BE of bipolar transistor (70) is further utilized to produce the output reference voltage. A temperature stabilization circuit (58, 82, 86, 90, 92 and 94) is provided with an opposite temperature coefficient from that of the bipolar transistors (40, 70). The temperature stabilization circuit is connected to counteract the influence of the temperature coefficient of the bipolar transistors on the output reference voltage. There is thus established an output reference voltage which is substantially independent of supply voltage, processing and temperature.

    摘要翻译: PCT No.PCT / US81 / 00699 Sec。 371日期:1981年5月18日 (e)日期1981年5月18日PCT提交1981年5月18日。电压参考电路(10)在输出端子(66,76)处产生参考电压。 输出参考电压基本上与电源电压,集成电路制造工艺和温度的变化无关。 电流参考电路(30,32,34,36,38,56和84)在双极晶体管(40,70)中产生恒定的发射极电流。 由于恒定的发射极电流,双极晶体管(40,70)的VBE是稳定的基准。 制造具有相似几何形状的双极晶体管(40,70),以消除参考电压对双极性处理变化的依赖性。 双极晶体管(40)的VBE产生提供给双极晶体管(70)的基极的参考电流。 双极晶体管(70)的VBE进一步用于产生输出参考电压。 温度稳定电路(58,82,86,90,92和94)具有与双极晶体管(40,70)相反的温度系数。 连接温度稳定电路以抵消双极晶体管的温度系数对输出参考电压的影响。 因此建立了基本上与供电电压,处理和温度无关的输出参考电压。

    DETERMINATION OF DIPOLE FOR TISSUE CONDUCTANCE COMMUNICATION
    3.
    发明申请
    DETERMINATION OF DIPOLE FOR TISSUE CONDUCTANCE COMMUNICATION 有权
    用于组织结构通信的DIPOLE的确定

    公开(公告)号:US20120109258A1

    公开(公告)日:2012-05-03

    申请号:US12915788

    申请日:2010-10-29

    IPC分类号: A61N1/08

    摘要: Aspects of the present disclosure include a medical device system including an implantable medical device and an external device with three or more electrodes configured to contact a patient's skin. The external device either transmits or receives a test signal to or from the implantable medical device using a plurality of possible receive dipoles, where each possible receive dipole is formed by a pair of electrodes. A signal quality monitor, either at the implantable medical device or at the external device, measures a signal quality for the possible receive dipoles.

    摘要翻译: 本公开的方面包括包括可植入医疗装置的医疗装置系统和具有被配置为接触患者皮肤的三个或更多个电极的外部装置。 外部设备使用多个可能的接收偶极子向可植入医疗设备发送测试信号或从可植入医疗设备接收测试信号,其中每个可能的接收偶极由一对电极形成。 在可植入医疗设备或外部设备处的信号质量监视器测量可能的接收偶极子的信号质量。

    IMPLANTABLE MEDICAL DEVICE WITH LOW POWER DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER
    4.
    发明申请
    IMPLANTABLE MEDICAL DEVICE WITH LOW POWER DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER 有权
    具有低功耗DELTA-SIGMA模拟到数字转换器的可植入医疗设备

    公开(公告)号:US20090079606A1

    公开(公告)日:2009-03-26

    申请号:US11861920

    申请日:2007-09-26

    IPC分类号: H03M3/02

    摘要: In general, this disclosure describes techniques for reducing power consumption within an implantable medical device (IMD). An IMD implanted within a patient may have finite power resources that are intended to last several years. To promote device longevity, sensing and therapy circuits of the IMD are designed to incorporate an analog-to-digital converter (ADC) that provides relatively high resolution output at a relatively low operation frequency, and does so with relatively low power consumption. An ADC designed in accordance with the techniques described herein utilizes a quantizer that has a lower resolution than a digital-to-analog converter (DAC) used for negative feedback. Such a configuration provides the benefits of higher resolution DAC feedback without having the use high oversampling ratios that result in high power consumption. Also, the techniques avoid the use of, and the associated high power consumption of, a high resolution flash ADC, within the sigma delta loop.

    摘要翻译: 通常,本公开描述了用于降低可植入医疗装置(IMD)内的功率消耗的技术。 植入患者体内的IMD可能具有有限的功率资源,这些功率资源将持续数年。 为了促进设备使用寿命,IMD的感测和治疗电路被设计为包含在相对低的操作频率下提供相对高分辨率输出的模数转换器(ADC),并且以相对较低的功耗来实现。 根据本文描述的技术设计的ADC利用具有比用于负反馈的数模转换器(DAC)更低的分辨率的量化器。 这种配置提供了更高分辨率DAC反馈的优点,而不需要使用导致高功耗的高过采样比。 此外,该技术避免了在Σ-Δ环路内使用高分辨率闪存ADC的相关高耗能。

    Loop length compensation circuit
    5.
    发明授权
    Loop length compensation circuit 失效
    环路长度补偿电路

    公开(公告)号:US4453037A

    公开(公告)日:1984-06-05

    申请号:US335142

    申请日:1981-12-28

    申请人: Michael B. Terry

    发明人: Michael B. Terry

    IPC分类号: H04M1/76 H04B3/36

    CPC分类号: H04M1/76

    摘要: A compensation circuit (10) controls the gain of transmit and receive amplifiers (47), (49) as a function of a residual input current (I.sub.res). Circuit (10) includes a constant current source (24) which is connected to produce mirrored constant currents in transistors (26) and (28). The residual current is passed through a resistor (R.sub.loop) to produce a reference voltage. The constant current from the transistor (26) is divided with the first part of the current passing through the resistor (R.sub.loop) and the second part of the current passing through a resistor (50) and a transistor (54). The transistor (54) is connected in a mirror configuration with a transistor (58). When the residual current increases, the current mirrored to transistor (58) decreases. A transistor (32) is connected in parallel with the transistor (58) to receive the remaining current from the transistor (28) which is not drawn by the transistor (58). The transistor (32) serves as the master side of a mirror circuit having slave transistors (38) and (42). The current mirrored to the transistors (38), (42) is drawn from the amplifiers (47), (49) wherein the current through the amplifiers is proportional to the gain thereof. Thus, the gain of the amplifiers is inversely proportional to the residual current thereby compensating the amplifier gain for the length of the telephone line.

    摘要翻译: 补偿电路(10)根据剩余输入电流(Ires)控制发射和接收放大器(47),(49)的增益。 电路(10)包括恒流源(24),其连接以在晶体管(26)和(28)中产生镜像恒定电流。 剩余电流通过电阻(Rloop)以产生参考电压。 来自晶体管(26)的恒定电流与通过电阻器(R loop)的电流的第一部分和通过电阻器(50)和晶体管(54)的电流的第二部分分开。 晶体管(54)以反射镜配置与晶体管(58)连接。 当剩余电流增加时,镜像到晶体管(58)的电流减小。 晶体管(32)与晶体管(58)并联连接,以从晶体管(28)接收未被晶体管(58)吸引的剩余电流。 晶体管(32)用作具有从晶体管(38)和(42)的镜电路的主侧。 从放大器(47),(49)中抽出与晶体管(38),(42)镜像的电流,其中通过放大器的电流与其增益成比例。 因此,放大器的增益与剩余电流成反比,从而补偿了电话线长度的放大器增益。

    Moment Fraction Computation for Sensors
    7.
    发明申请
    Moment Fraction Computation for Sensors 有权
    传感器的瞬时分数计算

    公开(公告)号:US20120245489A1

    公开(公告)日:2012-09-27

    申请号:US13176018

    申请日:2011-07-05

    IPC分类号: A61B5/103

    摘要: An implantable medical sensor system provides signals representative of a magnitude of moment fraction applied to a sensor module at a selected site. A sensor module includes a first transducer producing a first signal having an associated first response to pressure and strain applied to the sensor module and a second transducer producing a second signal having an associated second response to pressure and strain applied to the sensor module. A moment fraction is computed in response to the first signal and the second signal. In various embodiments, the moment fraction is used to guide positioning of the sensor module, indicate a need for repositioning the sensor module, report loading of the sensor module during normal operation for use as sensor design information and in setting sensor calibration ranges.

    摘要翻译: 可植入医疗传感器系统提供表示在所选位置处施加到传感器模块的力矩分数的大小的信号。 传感器模块包括第一传感器,其产生具有对施加到传感器模块的压力和应变的相关联的第一响应的第一信号,以及产生具有对施加到传感器模块的压力和应变的相关联的第二响应的第二信号的第二传感器。 响应于第一信号和第二信号计算力矩分数。 在各种实施例中,力矩分数用于引导传感器模块的定位,指示需要重新定位传感器模块,在正常操作期间报告传感器模块的负载,以用作传感器设计信息和设置传感器校准范围。

    Low voltage, low power RC oscillator circuit
    8.
    发明授权
    Low voltage, low power RC oscillator circuit 失效
    低电压,低功耗RC振荡电路

    公开(公告)号:US4479097A

    公开(公告)日:1984-10-23

    申请号:US270528

    申请日:1981-12-24

    IPC分类号: H03K4/501 H03K4/50

    CPC分类号: H03K4/501

    摘要: A resistor-capacitor oscillator circuit (10) is provided and includes a voltage comparator circuit (12). A capacitor (20) is connected to an input terminal (14) of the voltage comparator circuit (12). A resistor divider network (30) is coupled to an input terminal (16) of the voltage comparator circuit (12) for generating a reference voltage. A delay circuit (50, 52) is coupled to an output terminal (42) of the voltage comparator circuit (12). A discharge device (54) is coupled to the delay circuit (50, 52) and to the capacitor (20) for discharging the capacitor (20). A switching device (40) is coupled to the output (42) of the voltage comparator circuit (12) and to the resistor divider network (30) for controlling the application of the reference voltage to voltage comparator circuit (12).

    摘要翻译: PCT No.PCT / US80 / 01724 Sec。 371日期1980年12月24日 102(e)1980年12月24日PCT PCT Filated 1980年12月24日PCT公布。 公开号WO82 / 02298 日期为1982年7月8日。提供了一种电阻 - 电容振荡器电路(10),其包括电压比较器电路(12)。 电容器(20)连接到电压比较器电路(12)的输入端子(14)。 电阻分压器网络(30)耦合到电压比较器电路(12)的输入端子(16),用于产生参考电压。 延迟电路(50,52)耦合到电压比较器电路(12)的输出端子(42)。 放电装置(54)耦合到延迟电路(50,52)和电容器(20),用于对电容器(20)进行放电。 开关装置(40)耦合到电压比较器电路(12)的输出端(42)和电阻分压器网络(30),用于控制参考电压施加到电压比较器电路(12)。

    Implantable medical device with low power delta-sigma analog-to-digital converter
    9.
    发明授权
    Implantable medical device with low power delta-sigma analog-to-digital converter 有权
    具有低功耗delta-sigma模数转换器的可植入医疗设备

    公开(公告)号:US07623053B2

    公开(公告)日:2009-11-24

    申请号:US11861920

    申请日:2007-09-26

    IPC分类号: H03M1/66

    摘要: In general, this disclosure describes techniques for reducing power consumption within an implantable medical device (IMD). An IMD implanted within a patient may have finite power resources that are intended to last several years. To promote device longevity, sensing and therapy circuits of the IMD are designed to incorporate an analog-to-digital converter (ADC) that provides relatively high resolution output at a relatively low operation frequency, and does so with relatively low power consumption. An ADC designed in accordance with the techniques described herein utilizes a quantizer that has a lower resolution than a digital-to-analog converter (DAC) used for negative feedback. Such a configuration provides the benefits of higher resolution DAC feedback without having the use high oversampling ratios that result in high power consumption. Also, the techniques avoid the use of, and the associated high power consumption of, a high resolution flash ADC, within the sigma delta loop.

    摘要翻译: 通常,本公开描述了用于降低可植入医疗装置(IMD)内的功率消耗的技术。 植入患者体内的IMD可能具有有限的功率资源,这些功率资源将持续数年。 为了促进设备使用寿命,IMD的感测和治疗电路被设计为包含在相对低的操作频率下提供相对高分辨率输出的模数转换器(ADC),并且以相对较低的功耗来实现。 根据本文描述的技术设计的ADC利用具有比用于负反馈的数模转换器(DAC)更低的分辨率的量化器。 这种配置提供了更高分辨率DAC反馈的优点,而不需要使用导致高功耗的高过采样比。 此外,该技术避免了在Σ-Δ环路内使用高分辨率闪存ADC的相关高耗能。

    Sidetone circuit
    10.
    发明授权
    Sidetone circuit 失效
    侧音电路

    公开(公告)号:US4445002A

    公开(公告)日:1984-04-24

    申请号:US335144

    申请日:1981-12-28

    申请人: Michael B. Terry

    发明人: Michael B. Terry

    IPC分类号: H04M1/58 H04B1/58

    CPC分类号: H04M1/585

    摘要: A sidetone circuit (44) is connected to the terminals of a two-line telephone system. The sidetone circuit (44) receives inputs from a DTMF source (62) and a microphone (72). These inputs are selectively passed through a circuit (82) to produce a modulating signal which controls a current source (46) and a current (54). The current source (46) is connected between the telephone line terminals. The input audio signal from the microphone (72) modulates the current source (46) to impress a voltage upon the telephone line. The current source (54) is connected between a first of the telephone lines and a balance node (60). A resistor (58) is connected between the balance node and the second of the telephone lines. An incoming audio signal over the telephone line is coupled to the balance node (60) for summing with an inverted audio signal. The input audio signal from the microphone (72) is further coupled to the balance node (60). The inverted subscriber audio signal serves to attenuate the noninverted subscriber audio signal. The resulting signal at the balance node (60) is coupled through a capacitor (120) to an amplifier (88) for driving an output speaker (104). As a result of this circuit configuration the incoming audio signal has a minimum attenuation while a maximum amplitude signal is applied to the telephone line and a controlled sidetone signal is returned to the subscriber's speaker (104).

    摘要翻译: 侧线电路(44)连接到双线电话系统的终端。 侧音电路(44)接收来自DTMF源(62)和麦克风(72)的输入。 这些输入选择性地通过电路(82)以产生控制电流源(46)和电流(54)的调制信号。 电流源(46)连接在电话线终端之间。 来自麦克风(72)的输入音频信号调制电流源(46)以在电话线上施加电压。 电流源(54)连接在第一电话线和平衡节点(60)之间。 电平(58)连接在平衡节点和第二电话线之间。 通过电话线路的输入音频信号被耦合到平衡节点(60)以与反相音频信号相加。 来自麦克风(72)的输入音频信号还耦合到平衡节点(60)。 反相用户音频信号用于衰减非反相用户音频信号。 在平衡节点(60)处产生的信号通过电容器(120)耦合到用于驱动输出扬声器(104)的放大器(88)。 作为该电路配置的结果,输入音频信号具有最小衰减,而最大幅度信号被施加到电话线路,并且受控的侧音信号被返回给用户的扬声器(104)。