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1.发明授权Method, system and computer program product for sampling computer system performance data 失效方法，系统和计算机程序产品，用于对计算机系统性能数据进行采样公开(公告)号：US07870438B2
公开(公告)日：2011-01-11
申请号：US12031727
申请日：2008-02-15
申请人： Jane H. Bartik , Martin Recktenwald , Chung-Lung Kevin Shum , Scott B. Swaney , Patrick M. West, Jr.
发明人： Jane H. Bartik , Martin Recktenwald , Chung-Lung Kevin Shum , Scott B. Swaney , Patrick M. West, Jr.
IPC分类号： G06F11/00
CPC分类号： G06F11/3636 , G06F11/3466 , G06F11/3476
摘要： A system, method and computer program product for sampling computer system performance data are provided. The system includes a sample buffer to store instrumentation data while capturing trace data in a trace array, where the instrumentation data enables measurement of computer system performance. The system further includes a sample interrupt generator to assert a sample interrupt indicating that the instrumentation data is available to read. The sample interrupt is asserted in response to storing the instrumentation data in the sample buffer.
摘要翻译： 提供了一种用于采样计算机系统性能数据的系统，方法和计算机程序产品。 该系统包括一个样本缓冲区，用于存储仪器数据，同时捕获跟踪阵列中的跟踪数据，其中仪器数据可以测量计算机系统性能。 该系统还包括一个样本中断发生器，用于断言一个样本中断，指示仪器数据可用于读取。 响应于将仪器数据存储在采样缓冲器中，取样中断被置位。
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2.发明申请METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR SAMPLING COMPUTER SYSTEM PERFORMANCE DATA 失效用于采样计算机系统性能数据的方法，系统和计算机程序产品公开(公告)号：US20090210752A1
公开(公告)日：2009-08-20
申请号：US12031727
申请日：2008-02-15
申请人： Jane H. Bartik , Martin Recktenwald , Chung-Lung Kevin Shum , Scott B. Swaney , Patrick M. West, JR.
发明人： Jane H. Bartik , Martin Recktenwald , Chung-Lung Kevin Shum , Scott B. Swaney , Patrick M. West, JR.
IPC分类号： G06F11/00
CPC分类号： G06F11/3636 , G06F11/3466 , G06F11/3476
摘要： A system, method and computer program product for sampling computer system performance data are provided. The system includes a sample buffer to store instrumentation data while capturing trace data in a trace array, where the instrumentation data enables measurement of computer system performance. The system further includes a sample interrupt generator to assert a sample interrupt indicating that the instrumentation data is available to read. The sample interrupt is asserted in response to storing the instrumentation data in the sample buffer.
摘要翻译： 提供了一种用于采样计算机系统性能数据的系统，方法和计算机程序产品。 该系统包括一个样本缓冲区，用于存储仪器数据，同时捕获跟踪阵列中的跟踪数据，其中仪器数据可以测量计算机系统性能。 该系统还包括一个样本中断发生器，用于断言一个样本中断，指示仪器数据可用于读取。 响应于将仪器数据存储在采样缓冲器中，取样中断被置位。
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3.发明申请MICROARCHITECTURE, METHOD AND COMPUTER PROGRAM PRODUCT FOR EFFICIENT DATA GATHERING FROM A SET OF TRACE ARRAYS 失效微观研究，方法和计算机程序产品，用于从一组跟踪阵列高效数据收集公开(公告)号：US20090217012A1
公开(公告)日：2009-08-27
申请号：US12036540
申请日：2008-02-25
申请人： Patrick M. West, JR. , Jane H. Bartik , Martin Recktenwald , Chung-Lung K. Shum , Scott B. Swaney
发明人： Patrick M. West, JR. , Jane H. Bartik , Martin Recktenwald , Chung-Lung K. Shum , Scott B. Swaney
IPC分类号： G06F9/22
CPC分类号： G06F11/3466
摘要： An architecture for collecting performance data in a processor, that includes: a trace read control unit and a trace data collect unit, each unit coupled to a plurality of trace array and multiplex units for providing performance data, the coupling accomplished by a trace read control bus, a data select bus, a trace row address bus and a data return bus; wherein each of the trace array and multiplex units receives a trace read signal and provides data including trace data and the trace read signal to the trace data collect unit. A method and a computer program product are provided.
摘要翻译： 一种用于在处理器中收集性能数据的架构，其包括：跟踪读取控制单元和跟踪数据收集单元，每个单元耦合到多个跟踪阵列和用于提供性能数据的多路复用单元，所述耦合由跟踪读取控制 总线，数据选择总线，跟踪行地址总线和数据返回总线; 其中每个跟踪阵列和多路复用单元接收跟踪读取信号，并将跟踪数据和跟踪读取信号的数据提供给跟踪数据收集单元。 提供了一种方法和计算机程序产品。
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4.发明授权Microarchitecture, method and computer program product for efficient data gathering from a set of trace arrays 失效微结构，方法和计算机程序产品，用于从一组跟踪数组收集高效数据公开(公告)号：US08127118B2
公开(公告)日：2012-02-28
申请号：US12036540
申请日：2008-02-25
申请人： Patrick M. West, Jr. , Jane H. Bartik , Martin Recktenwald , Chung-Lung K. Shum , Scott B. Swaney
发明人： Patrick M. West, Jr. , Jane H. Bartik , Martin Recktenwald , Chung-Lung K. Shum , Scott B. Swaney
CPC分类号： G06F11/3466
摘要： An architecture for collecting performance data in a processor, that includes: a trace read control unit and a trace data collect unit, each unit coupled to a plurality of trace array and multiplex units for providing performance data, the coupling accomplished by a trace read control bus, a data select bus, a trace row address bus and a data return bus; wherein each of the trace array and multiplex units receives a trace read signal and provides data including trace data and the trace read signal to the trace data collect unit. A method and a computer program product are provided.
摘要翻译： 一种用于在处理器中收集性能数据的架构，其包括：跟踪读取控制单元和跟踪数据收集单元，每个单元耦合到多个跟踪阵列和用于提供性能数据的多路复用单元，所述耦合由跟踪读取控制 总线，数据选择总线，跟踪行地址总线和数据返回总线; 其中每个跟踪阵列和多路复用单元接收跟踪读取信号，并将跟踪数据和跟踪读取信号的数据提供给跟踪数据收集单元。 提供了一种方法和计算机程序产品。
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5.发明授权Method, system and computer program product for an even sampling spread over differing clock domain boundaries 失效方法，系统和计算机程序产品，用于在不同的时钟域边界上进行均匀采样公开(公告)号：US07983372B2
公开(公告)日：2011-07-19
申请号：US12031158
申请日：2008-02-14
IPC分类号： H04L7/00
CPC分类号： H04L7/0008
摘要： The present invention relates to a method, computer program product and system for generating a sample signal from differing clock domain boundaries. The system comprises a cycle base component, a sample offset component being configured to receive a time-based sample pulse signal, and logic to generate a sample pulse. The sample pulse generation logic is configured to receive a time-based sample pulse signal, a free running counter value, a sample offset counter value, and deliver a sample pulse signal.
摘要翻译： 本发明涉及一种用于从不同时钟域边界产生采样信号的方法，计算机程序产品和系统。 该系统包括循环基础组件，被配置为接收基于时间的采样脉冲信号的采样偏移分量和用于产生采样脉冲的逻辑。 采样脉冲发生逻辑被配置为接收基于时间的采样脉冲信号，自由运行计数器值，采样偏移计数器值，并且传送采样脉冲信号。
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6.发明授权Method, system and computer program product for event-based sampling to monitor computer system performance 失效用于事件采样的方法，系统和计算机程序产品，用于监视计算机系统的性能公开(公告)号：US07881906B2
公开(公告)日：2011-02-01
申请号：US12031735
申请日：2008-02-15
CPC分类号： G06F11/3466 , G06F2201/86 , G06F2201/88 , G06F2201/885
摘要： A system, method and computer program product for event-based sampling to monitor computer system performance are provided. The system includes a sample buffer to store a sample of instrumentation data, where the instrumentation data enables measurement of computer system performance. The system also includes a sample segment selector to isolate a segment of the sample of instrumentation data as an event. The system further includes an instrumentation counter counting in response to a combination of the event and a sample pulse, and asserting a sample interrupt indicating that the sample of instrumentation data is ready to logout from the sample buffer.
摘要翻译： 提供了一种用于监控计算机系统性能的用于事件采样的系统，方法和计算机程序产品。 该系统包括用于存储仪器数据样本的样本缓冲区，其中仪器数据可以测量计算机系统性能。 该系统还包括样本段选择器，以将事件的仪器数据样本的一段隔离。 该系统还包括响应于事件和采样脉冲的组合的仪表计数器计数，并且断言指示仪器数据的样本准备从采样缓冲器注销。
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7.发明申请METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR AN EVEN SAMPLING SPREAD OVER DIFFERING CLOCK DOMAIN BOUNDARIES 失效方法，系统和计算机程序产品，用于通过不同的时域域边界进行采样公开(公告)号：US20090207958A1
公开(公告)日：2009-08-20
申请号：US12031158
申请日：2008-02-14
IPC分类号： H04L7/00
CPC分类号： H04L7/0008
摘要： The present invention relates to a method, computer program product and system for generating a sample signal from differing clock domain boundaries. The system comprises a cycle base component, a sample offset component being configured to receive a time-based sample pulse signal, and logic to generate a sample pulse. The sample pulse generation logic is configured to receive a time-based sample pulse signal, a free running counter value, a sample offset counter value, and deliver a sample pulse signal.
摘要翻译： 本发明涉及一种用于从不同时钟域边界产生采样信号的方法，计算机程序产品和系统。 该系统包括循环基础组件，被配置为接收基于时间的采样脉冲信号的采样偏移分量和用于产生采样脉冲的逻辑。 采样脉冲发生逻辑被配置为接收基于时间的采样脉冲信号，自由运行计数器值，采样偏移计数器值，并且传送采样脉冲信号。
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8.发明申请METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR EVENT-BASED SAMPLING TO MONITOR COMPUTER SYSTEM PERFORMANCE 失效方法，系统和计算机程序产品，用于基于事件的采样监控计算机系统性能公开(公告)号：US20090210196A1
公开(公告)日：2009-08-20
申请号：US12031735
申请日：2008-02-15
IPC分类号： G06F15/00
CPC分类号： G06F11/3466 , G06F2201/86 , G06F2201/88 , G06F2201/885
摘要： A system, method and computer program product for event-based sampling to monitor computer system performance are provided. The system includes a sample buffer to store a sample of instrumentation data, where the instrumentation data enables measurement of computer system performance. The system also includes a sample segment selector to isolate a segment of the sample of instrumentation data as an event. The system further includes an instrumentation counter counting in response to a combination of the event and a sample pulse, and asserting a sample interrupt indicating that the sample of instrumentation data is ready to logout from the sample buffer.
摘要翻译： 提供了一种用于监控计算机系统性能的用于事件采样的系统，方法和计算机程序产品。 该系统包括用于存储仪器数据样本的样本缓冲器，其中仪器数据可以测量计算机系统性能。 该系统还包括样本段选择器，以将事件的仪器数据样本的一段隔离。 该系统还包括响应于事件和采样脉冲的组合的仪表计数器计数，并且断言指示仪器数据的样本准备从采样缓冲器注销。
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公开(公告)号：US20140082290A1
公开(公告)日：2014-03-20
申请号：US13621328
申请日：2012-09-17
IPC分类号： G06F12/08
CPC分类号： G06F12/0897 , G06F12/0844 , G06F12/0893 , G06F2212/1016 , G06F2212/6042
摘要： A mechanism is provided in a data processing system for enhancing wiring structure for a cache supporting an auxiliary data output. The mechanism splits the data cache into a first data portion and a second data portion. The first data portion provides a first set of data elements and the second data portion provides a second set of data elements. The mechanism connects a first data path to provide the first set of data elements to a primary output and connects a second data path to provide the second set of data elements to the primary output. The mechanism feeds the first data path back into the second data path and feeds the second data path back into the first data path. The mechanism connects a secondary output to the second data path.
摘要翻译： 在用于增强支持辅助数据输出的高速缓存的布线结构的数据处理系统中提供一种机制。 该机制将数据高速缓存分解成第一数据部分和第二数据部分。 第一数据部分提供第一组数据元素，第二数据部分提供第二组数据元素。 该机制连接第一数据路径以将第一组数据元素提供给主输出，并连接第二数据路径以将第二组数据元素提供给主输出。 该机构将第一数据路径馈送回第二数据路径并将第二数据路径馈送回第一数据路径。 该机制将辅助输出连接到第二数据路径。
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10.发明授权公开(公告)号：US08495452B2
公开(公告)日：2013-07-23
申请号：US13024775
申请日：2011-02-10
申请人： Michael Fee , Christian Habermann , Christian Jacobi , Diana L. Orf , Martin Recktenwald , Hans-Werner Tast , Ralf Winkelmann
发明人： Michael Fee , Christian Habermann , Christian Jacobi , Diana L. Orf , Martin Recktenwald , Hans-Werner Tast , Ralf Winkelmann
IPC分类号： H03M13/00
CPC分类号： G06F11/1064
摘要： Handling corrupted background data in an out of order processing environment. Modified data is stored on a byte of a word having at least one byte of background data. A byte valid vector and a byte store bit are added to the word. Parity checking is done on the word. If the word does not contain corrupted background date, the word is propagated to the next level of cache. If the word contains corrupted background data, a copy of the word is fetched from a next level of cache that is ECC protected, the byte having the modified data is extracted from the word and swapped for the corresponding byte in the word copy. The word copy is then written into the next level of cache that is ECC protected.
摘要翻译： 在乱序处理环境中处理损坏的背景数据。 修改的数据存储在具有至少一个字节的背景数据的字的字节上。 一个字节有效向量和一个字节存储位被加到该字中。 对这个词进行奇偶校验。 如果该单词不包含损坏的背景日期，该单词将传播到下一级缓存。 如果该单词包含已损坏的背景数据，则该字的副本将从ECC保护的高级缓存中提取，具有修改后的数据的字节将从该字中提取出来并交换为字副本中的相应字节。 然后将该字复制到被保护的ECC缓存的下一级。
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