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1.发明申请MICROARCHITECTURE, METHOD AND COMPUTER PROGRAM PRODUCT FOR EFFICIENT DATA GATHERING FROM A SET OF TRACE ARRAYS 失效微观研究，方法和计算机程序产品，用于从一组跟踪阵列高效数据收集公开(公告)号：US20090217012A1
公开(公告)日：2009-08-27
申请号：US12036540
申请日：2008-02-25
申请人： Patrick M. West, JR. , Jane H. Bartik , Martin Recktenwald , Chung-Lung K. Shum , Scott B. Swaney
发明人： Patrick M. West, JR. , Jane H. Bartik , Martin Recktenwald , Chung-Lung K. Shum , Scott B. Swaney
IPC分类号： G06F9/22
CPC分类号： G06F11/3466
摘要： An architecture for collecting performance data in a processor, that includes: a trace read control unit and a trace data collect unit, each unit coupled to a plurality of trace array and multiplex units for providing performance data, the coupling accomplished by a trace read control bus, a data select bus, a trace row address bus and a data return bus; wherein each of the trace array and multiplex units receives a trace read signal and provides data including trace data and the trace read signal to the trace data collect unit. A method and a computer program product are provided.
摘要翻译： 一种用于在处理器中收集性能数据的架构，其包括：跟踪读取控制单元和跟踪数据收集单元，每个单元耦合到多个跟踪阵列和用于提供性能数据的多路复用单元，所述耦合由跟踪读取控制 总线，数据选择总线，跟踪行地址总线和数据返回总线; 其中每个跟踪阵列和多路复用单元接收跟踪读取信号，并将跟踪数据和跟踪读取信号的数据提供给跟踪数据收集单元。 提供了一种方法和计算机程序产品。
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2.发明授权Microarchitecture, method and computer program product for efficient data gathering from a set of trace arrays 失效微结构，方法和计算机程序产品，用于从一组跟踪数组收集高效数据公开(公告)号：US08127118B2
公开(公告)日：2012-02-28
申请号：US12036540
申请日：2008-02-25
申请人： Patrick M. West, Jr. , Jane H. Bartik , Martin Recktenwald , Chung-Lung K. Shum , Scott B. Swaney
发明人： Patrick M. West, Jr. , Jane H. Bartik , Martin Recktenwald , Chung-Lung K. Shum , Scott B. Swaney
CPC分类号： G06F11/3466
摘要： An architecture for collecting performance data in a processor, that includes: a trace read control unit and a trace data collect unit, each unit coupled to a plurality of trace array and multiplex units for providing performance data, the coupling accomplished by a trace read control bus, a data select bus, a trace row address bus and a data return bus; wherein each of the trace array and multiplex units receives a trace read signal and provides data including trace data and the trace read signal to the trace data collect unit. A method and a computer program product are provided.
摘要翻译： 一种用于在处理器中收集性能数据的架构，其包括：跟踪读取控制单元和跟踪数据收集单元，每个单元耦合到多个跟踪阵列和用于提供性能数据的多路复用单元，所述耦合由跟踪读取控制 总线，数据选择总线，跟踪行地址总线和数据返回总线; 其中每个跟踪阵列和多路复用单元接收跟踪读取信号，并将跟踪数据和跟踪读取信号的数据提供给跟踪数据收集单元。 提供了一种方法和计算机程序产品。
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公开(公告)号：US07200742B2
公开(公告)日：2007-04-03
申请号：US11055193
申请日：2005-02-10
申请人： Fadi Y. Busaba , Michael J. Mack , John G. Rell, Jr. , Eric M. Schwarz , Chung-Lung K. Shum , Timothy J. Slegel , Scott B. Swaney , Sheryll H. Veneracion
发明人： Fadi Y. Busaba , Michael J. Mack , John G. Rell, Jr. , Eric M. Schwarz , Chung-Lung K. Shum , Timothy J. Slegel , Scott B. Swaney , Sheryll H. Veneracion
IPC分类号： G06F9/38
CPC分类号： G06F9/4812 , G06F9/30101 , G06F9/3863 , G06F2209/481
摘要： A method for creating precise exceptions including checkpointing an exception causing instruction. The checkpointing results in a current checkpointed state. The current checkpointed state is locked. It is determined if any of a plurality of registers require restoration to the current checkpointed state. One or more of the registers are restored to the current checkpointed state in response to the results of the determining indicating that the one or more registers require the restoring. The execution unit is restarted at the exception handler or the next sequential instruction dependent on whether traps are enabled for the exception.
摘要翻译： 一种用于创建精确异常的方法，包括检查指向引起异常的指令。 检查点导致当前检查点状态。 当前检查点状态被锁定。 确定多个寄存器中的任一个是否需要恢复到当前检查点状态。 响应于指示一个或多个寄存器需要恢复的确定结果，一个或多个寄存器恢复到当前检查点状态。 执行单元在异常处理程序或下一个顺序指令下重新启动，取决于是否为异常启用陷阱。
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公开(公告)号：US09411599B2
公开(公告)日：2016-08-09
申请号：US12822379
申请日：2010-06-24
申请人： Christian Jacobi , Barry W. Krumm , Brian R. Prasky , Martin Recktenwald , Chung-Lung K. Shum , Charles F. Webb , Joshua M. Weinberg
发明人： Christian Jacobi , Barry W. Krumm , Brian R. Prasky , Martin Recktenwald , Chung-Lung K. Shum , Charles F. Webb , Joshua M. Weinberg
CPC分类号： G06F9/3824 , G06F9/30043 , G06F9/3806 , G06F9/3844 , G06F9/3857
摘要： Data operand fetching control includes a computer processor that includes a control unit for determining memory access operations. The control unit is configured to perform a method. The method includes calculating a summation weight value for each instruction in a pipeline, the summation weight value calculated as a function of branch uncertainty and a pendency in which the instruction resides in the pipeline relative to other instructions in the pipeline. The method also includes mapping the summation weight value of a selected instruction that is attempting to access system memory to a memory access control, each memory access control specifying a manner of handling data fetching operations. The method further includes performing a memory access operation for the selected instruction based upon the mapping.
摘要翻译： 数据操作数获取控制包括计算机处理器，其包括用于确定存储器存取操作的控制单元。 控制单元被配置为执行方法。 该方法包括：计算流水线中每个指令的求和权重值，求和作为分支不确定度的函数计算的求和权重值以及相对于流水线中的其他指令，指令驻留在流水线中的挂起。 该方法还包括将尝试访问系统存储器的所选指令的求和权重值映射到存储器访问控制，每个存储器访问控制指定处理数据获取操作的方式。 该方法还包括基于映射执行针对所选择的指令的存储器访问操作。
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公开(公告)号：US20110320774A1
公开(公告)日：2011-12-29
申请号：US12822379
申请日：2010-06-24
申请人： Christian Jacobi , Barry W. Krumm , Brian R. Prasky , Martin Recktenwald , Chung-Lung K. Shum , Charles F. Webb , Joshua M. Weinberg
发明人： Christian Jacobi , Barry W. Krumm , Brian R. Prasky , Martin Recktenwald , Chung-Lung K. Shum , Charles F. Webb , Joshua M. Weinberg
IPC分类号： G06F9/38
CPC分类号： G06F9/3824 , G06F9/30043 , G06F9/3806 , G06F9/3844 , G06F9/3857
摘要： A system for data operand fetching control includes a computer processor that includes a control unit for determining memory access operations. The control unit is configured to perform a method. The method includes calculating a summation weight value for each instruction in a pipeline, the summation weight value calculated as a function of branch uncertainty and a pendency in which the instruction resides in the pipeline relative to other instructions in the pipeline. The method also includes mapping the summation weight value of a selected instruction that is attempting to access system memory to a memory access control, each memory access control specifying a manner of handling data fetching operations. The method further includes performing a memory access operation for the selected instruction based upon the mapping.
摘要翻译： 一种用于数据操作数取出控制的系统包括一计算机处理器，该计算机处理器包括用于确定存储器访问操作的控制 控制单元被配置为执行方法。 该方法包括：计算流水线中每个指令的求和权重值，求和作为分支不确定度的函数计算的求和权重值以及相对于流水线中的其他指令，指令驻留在流水线中的挂起。 该方法还包括将尝试访问系统存储器的所选择的指令的求和权重值映射到存储器访问控制，每个存储器访问控制指定处理数据获取操作的方式。 该方法还包括基于映射执行针对所选择的指令的存储器访问操作。
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公开(公告)号：US09891922B2
公开(公告)日：2018-02-13
申请号：US13524402
申请日：2012-06-15
CPC分类号： G06F9/38 , G06F9/30076 , G06F9/3844 , G06F9/3848
摘要： Embodiments relate to selectively blocking branch instruction predictions. An aspect includes a computer system for performing selective branch prediction. The system includes memory and a processor, and the system is configured to perform a method. The method includes detecting a branch-prediction blocking instruction in a stream of instructions and blocking branch prediction of a predetermined number of branch instructions following the branch-prediction blocking instruction based on the detecting the branch-prediction blocking instruction.
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公开(公告)号：US09465716B2
公开(公告)日：2016-10-11
申请号：US13422532
申请日：2012-03-16
CPC分类号： G06F11/3466 , G06F9/3005 , G06F11/3636 , G06F11/3644 , G06F11/3648
摘要： The invention relates to implementing run-time instrumentation directed sampling. An aspect of the invention includes fetching a run-time instrumentation next (RINEXT) instruction from an instruction stream. The instruction stream includes the RINEXT instruction followed by a next sequential instruction (NSI) in program order. The method further includes executing the RINEXT instruction by a processor. The executing includes determining whether a current run-time instrumentation state enables setting a sample point for reporting run-time instrumentation information during program execution. Based on the current run-time instrumentation state enabling setting the sample point, the NSI is a sample instruction for causing a run-time instrumentation event. Based on executing the NSI sample instruction, the run-time instrumentation event causes recording of run-time instrumentation information into a run-time instrumentation program buffer as a reporting group.
摘要翻译： 本发明涉及实施运行时仪表定向抽样。 本发明的一个方面包括从指令流获取运行时仪器下一个（RINEXT）指令。 指令流包括RINEXT指令，后面是程序顺序的下一个顺序指令（NSI）。 该方法还包括由处理器执行RINEXT指令。 该执行包括确定当前运行时仪表状态是否能够在程序执行期间设置用于报告运行时仪表信息的采样点。 根据当前的运行时仪器状态设置采样点，NSI是一个用于引起运行时仪表事件的示例指令。 基于执行NSI示例指令，运行时仪表事件将运行时仪表信息记录到作为报告组的运行时仪表程序缓冲区中。
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公开(公告)号：US09454462B2
公开(公告)日：2016-09-27
申请号：US13422542
申请日：2012-03-16
申请人： Mark S. Farrell , Charles W. Gainey, Jr. , Marcel M. Mitran , Damian L. Osisek , Chung-Lung K. Shum , Timothy J. Slegel , Brian L. Smith
发明人： Mark S. Farrell , Charles W. Gainey, Jr. , Marcel M. Mitran , Damian L. Osisek , Chung-Lung K. Shum , Timothy J. Slegel , Brian L. Smith
CPC分类号： G06F9/30145 , G06F9/3005 , G06F9/45533 , G06F11/3466 , G06F11/348 , G06F11/3644 , G06F2201/86 , G06F2201/88
摘要： The invention relates to monitoring processor characteristic information of a processor using run-time-instrumentation. An aspect of the invention includes executing an instruction stream on the processor and detecting a run-time instrumentation sample point of the executing instruction stream on the processor. A reporting group is stored in a run-time instrumentation program buffer based on the run-time instrumentation sample point. The reporting group includes processor characteristic information associated with the processor.
摘要翻译： 本发明涉及使用运行时间仪器监视处理器的处理器特性信息。 本发明的一个方面包括在处理器上执行指令流并检测处理器上的执行指令流的运行时检测采样点。 基于运行时仪器采样点，报告组存储在运行时仪表程序缓冲区中。 报告组包括与处理器相关联的处理器特性信息。
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公开(公告)号：US09152518B2
公开(公告)日：2015-10-06
申请号：US13353544
申请日：2012-01-19
申请人： Fadi Y. Busaba , Steven R. Carlough , Christopher A. Krygowski , Brian R. Prasky , Chung-Lung K. Shum
发明人： Fadi Y. Busaba , Steven R. Carlough , Christopher A. Krygowski , Brian R. Prasky , Chung-Lung K. Shum
摘要： A re-characterization process is provided that adjusts one or more operating parameters of a processor to improve the health (e.g., reduce errors) of the processor. The parameters include voltage and/or clock frequency, as examples. The processor can be an inactive or active processor for which the re-characterization process is performed. It is performed, in one instance, by a hardware controller in real-time.
摘要翻译： 提供了重新表征处理，其调整处理器的一个或多个操作参数以改善处理器的健康状况（例如，减少错误）。 参数包括电压和/或时钟频率，例如。 处理器可以是对其执行重新表征处理的非活动或活动处理器。 在一个实例中，它由硬件控制器实时执行。
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公开(公告)号：US08954797B2
公开(公告)日：2015-02-10
申请号：US13447554
申请日：2012-04-16
申请人： Fadi Y. Busaba , Steven R. Carlough , Christopher A. Krygowski , Brian R. Prasky , Chung-Lung K. Shum
发明人： Fadi Y. Busaba , Steven R. Carlough , Christopher A. Krygowski , Brian R. Prasky , Chung-Lung K. Shum
CPC分类号： G06F11/1446 , G06F1/3287 , G06F11/0772 , G06F11/0781 , G06F11/0793 , G06F11/1407 , G06F11/1425 , G06F11/1428 , Y02D10/171
摘要： A computer program product for performing error recovery is configured to perform a method that includes creating, by a processor, a recovery checkpoint. The processor is dynamically switched into a non-recoverable processing mode of operation based on creating the software recovery checkpoint. The non-recoverable processing mode of operation is a mode in which a subset of hardware error recovery resources are powered-down or re-purposed for instruction processing. It is determined, during the non-recoverable processing mode of operation, that a new software recovery checkpoint is required. Based on the determining that a new software recovery checkpoint is required, the processor is dynamically switched into a recoverable processing mode of operation. The recoverable processing mode of operation is a mode in which hardware error recovery resources, including at least one of the hardware error recovery resources in the subset, are purposed for hardware error recovery operations.
摘要翻译： 用于执行错误恢复的计算机程序产品被配置为执行包括由处理器创建恢复检查点的方法。 基于创建软件恢复检查点，处理器被动态切换到不可恢复的处理操作模式。 不可恢复的处理操作模式是硬件错误恢复资源的子集被掉电或重新用于指令处理的模式。 在不可恢复的处理操作模式下，确定需要新的软件恢复检查点。 基于确定需要新的软件恢复检查点，处理器被动态切换成可恢复的处理操作模式。 可恢复处理操作模式是硬件错误恢复资源（包括该子集中的至少一个硬件错误恢复资源）用于硬件错误恢复操作的模式。
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