公开(公告)号：US12287552B2

公开(公告)日：2025-04-29

申请号：US18508246

申请日：2023-11-14

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Masashi Tsubuku ,  Toshinari Sasaki ,  Takaya Tamaru

IPC: G02F1/1362 ,  G02F1/1368 ,  G06F3/044

Abstract: A display device includes a plurality of pixel electrodes each connected to a semiconductor device, a plurality of common electrodes each disposed opposite to a part of the plurality of pixel electrodes, and a plurality of common wirings each connected to the plurality of common electrodes. The semiconductor device includes an oxide semiconductor layer having a polycrystalline structure, and at least a part of each common wiring is composed of the oxide semiconductor layer. Each common electrode may be located across a plurality of pixel electrodes.

公开(公告)号：US12294024B2

公开(公告)日：2025-05-06

申请号：US17660729

申请日：2022-04-26

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Masashi Tsubuku ,  Kentaro Miura ,  Akihiro Hanada ,  Takaya Tamaru

IPC: H01L29/66 ,  H01L21/426 ,  H01L21/4757 ,  H01L21/4763 ,  H01L29/40 ,  H01L29/423 ,  H01L29/786

Abstract: According to one embodiment, a method of manufacturing a semiconductor device, includes forming a first insulating layer, an oxide semiconductor layer, a second insulating layer, a buffer layer and a metal layer sequentially on a base, forming a patterned resist on the metal layer, etching the buffer layer and the metal layer using the resist as a mask to expose an upper surface of the second insulating layer, reducing a volume of the resist to expose an upper surface along a side surface of the metal layer, etching the metal layer using the resist as a mask, to form a gate electrode and to expose an upper surface of the buffer layer, and carrying out ion implantation on the oxide semiconductor layer using the gate electrode as a mask.