摘要:
Methods, apparatus and systems for effecting Virtual Machine (VM) platform communication loopback and enabling user initiated network port failover. Network communications in platforms employing VMs and having multiple network ports accessible to the VMs are configured to be routed such that communications between VMs in the platform are looped back within the platform, thus not require routing through an external switch. This is facilitated via an Intelligent Channel Bonding Driver that dynamically enforces inter-VM traffic to ensure internal loopback within the same physical port. In another aspect, a user is enabled to initiate failover of a network port on a platform employing a Virtual Machine Manager and a plurality of VMs, wherein updated configuration information is sent to disable Virtual Function (VF) drivers associated with the network port.
摘要:
Methods, apparatus and systems for effecting Virtual Machine (VM) platform communication loopback and enabling user initiated network port failover. Network communications in platforms employing VMs and having multiple network ports accessible to the VMs are configured to be routed such that communications between VMs in the platform are looped back within the platform, thus not require routing through an external switch. This is facilitated via an Intelligent Channel Bonding Driver that dynamically enforces inter-VM traffic to ensure internal loopback within the same physical port. In another aspect, a user is enabled to initiate failover of a network port on a platform employing a Virtual Machine Manager and a plurality of VMs, wherein updated configuration information is sent to disable Virtual Function (VF) drivers associated with the network port.
摘要:
A two stage fully differential amplifier has been designed which works, in tandem with a TX-FIR, as a linear equalizer at low frequencies, not covered by the TX-FIR, and also acts as a linear amplifier at higher frequencies which are equalized by the TX-FIR. The amplifier as a frequency response which does not attenuate signals frequencies less than one twentieth of baud rate, creates gain peaking ion the region between one twentieth and one tenth of baud rate and maintains flat peak gain up to half of baud rate. Different aspects of the frequency response curve (such as dc gain, max gain and zero frequency) are completely programmable. Also, the differential amplifier has been designed from low power and process, voltage and temperature insensitive frequency response.
摘要:
A set of search requests may be analyzed to detect fixed phrases suitable for inclusion in a search index. Sets of candidate phrases may be identified among the search requests. Fixed phrases may be detected among the candidate phrases using statistical techniques, for example, by identifying phrases having a relatively high pointwise mutual information (PMI) with respect to component keywords. Fixed phrase detection may include keyword and/or phrase clustering. Clusters may correspond to topics defined using a latent Dirichlet allocation (LDA) procedure. Fixed phrase detection may include identifying phrases having relatively high PMI within particular clusters.
摘要:
An analog baud rate clock and data recovery apparatus includes a first track and hold circuit that delays a received signal by one unit interval to create an odd signal; a second track and hold circuit that delays the received signal by one unit interval to create an even signal; a first comparator circuit; and a second comparator circuit. The first track and hold circuit outputs the odd signal to the first comparator circuit and the second comparator circuit. The second track and hold circuit outputs the even signal to the first comparator circuit and the second comparator circuit. The first comparator adds the odd signal to the even signal and outputs a first potential timing error. The second comparator subtracts the odd signal and the even signal and outputs a second potential timing error signal. A desired timing error signal is derived from the first and second potential timing error signals. The desired timing error signal is used to determine whether signal sampling is early or late.
摘要:
A feedback module is defined to receive as input a set of data sample signals and a set of reference sample signals. Each of the data and reference sample signals is generated by sampling a differential signal having been transmitted through a FIR filter. The feedback module is defined to operate a respective post cursor counter for each post cursor of the FIR filter and update the post cursor counters based on the received sets of data and reference sample signals. Also, the feedback module is defined to generate a tap weight adjustment signal for a given tap weight of the FIR filter when a magnitude of a post cursor counter corresponding to the given tap weight is greater than or equal to a threshold value. An adaptation module is defined to adapt a reference voltage used to generate the reference sample signals to a condition of the differential signal.
摘要:
A set of search requests may be analyzed to detect fixed phrases suitable for inclusion in a search index. Sets of candidate phrases may be identified among the search requests. Fixed phrases may be detected among the candidate phrases using statistical techniques, for example, by identifying phrases having a relatively high pointwise mutual information (PMI) with respect to component keywords. Fixed phrase detection may include keyword and/or phrase clustering. Clusters may correspond to topics defined using a latent Dirichlet allocation (LDA) procedure. Fixed phrase detection may include identifying phrases having relatively high PMI within particular clusters.
摘要:
A method for determining the value of at least one capacitance required to be placed in a conductive path on a printed circuit board is disclosed. The method includes preparing a desired signal spectrum for the conductive path, preparing an actual signal spectrum for the conductive path, and then comparing the actual signal spectrum against the desired signal spectrum to determine where any out of tolerance conditions exist. If the actual signal spectrum is in amplitude versus time form, the method further includes performing, for each time having a voltage which is higher than the maximum voltage allowed on the conductive path, a fourier transform on the amplitude versus time data. Following the optional conversion, the method proceeds with the determination of at least one frequency having an amplitude which significantly contributes to the out of tolerance condition, and computing, for the one or more frequencies contributing to the out of tolerance condition, a value of capacitance which would diminish the amplitude at that frequency to a value which is within tolerance.
摘要:
A 5 volt tolerant I/O buffer circuit is coupled to a power supply terminal of a predetermined power supply voltage, for driving an I/O pad to a logic state depending on an input signal and an output enable signal. The I/O buffer circuit minimizes current flow into the power supply terminal when the pad is coupled to a voltage greater than the predetermined power supply voltage. A driver transistor of a first type is formed within a diffusion well and is coupled to the predetermined power supply voltage and to the pad. First and second terminals of a protection transistor are coupled to respective ones of the predetermined power supply voltage and the diffusion well. Circuitry is provided for, when the output enable signal is active, turning on the protection transistor so as to couple the predetermined power supply voltage to the diffusion well, regardless of a voltage level of the pad. A single protection transistor is sufficient to prevent current leakage through the parasitic PN diode.
摘要:
A mixed voltage compatible buffer having reduced power consumption is provided. One embodiment of the buffer according to the present invention comprises: a data input configured to receive an output data signal; a data interface configured to couple with a pad interconnect; an output driver coupled with said data interface and being configured to apply the output data signal thereto; and a data controller intermediate said data input and said output driver, said data controller being configured to apply a plurality of control signals of substantially equal voltage to said output driver to control the operation thereof responsive to the output data signal received via said data input. The present invention also provides for a method of transferring data within the buffer.