Elimination of poly stringers with straight poly profile
    3.
    发明授权
    Elimination of poly stringers with straight poly profile 失效
    消除具有直的聚轮廓的多边形

    公开(公告)号:US6046085A

    公开(公告)日:2000-04-04

    申请号:US986951

    申请日:1997-12-08

    申请人: Maria Chow Chan

    发明人: Maria Chow Chan

    IPC分类号: H01L21/8247 H01L21/336

    CPC分类号: H01L27/11521

    摘要: A method of preventing poly stringers in the formation of a memory device includes the steps of forming at least one field oxide region in a substrate and forming a tunnel oxide over the substrate. A first polysilicon layer is then formed over the tunnel oxide and a poly mask having a mask profile is formed over the first polysilicon layer. The first polysilicon layer is then etched in portions exposed by the poly mask, thereby creating a first polysilicon layer etch profile, wherein the first polysilicon layer etch profile is substantially ideally anisotropic and independent of the mask profile. An insulating layer and a conductive layer is then formed over the etched first polysilicon layer and portions of the conductive layer are then etched to form word lines. The insulating layer is then etched in regions adjacent the word lines, thereby leaving a substantially vertical insulative fence along the first polysilicon layer etch profile. Lastly, the first polysilicon layer is again etched in regions adjacent the word lines, wherein the etching of the first polysilicon layer is substantially anisotropic and removes substantially all the polysilicon in the regions adjacent the word lines, resulting in the prevention of poly stringers.

    摘要翻译: 防止多晶硅在形成存储器件中的方法包括以下步骤:在衬底中形成至少一个场氧化物区域,并在衬底上形成隧道氧化物。 然后在隧道氧化物上形成第一多晶硅层,并且在第一多晶硅层上形成具有掩模分布的多晶硅掩膜。 然后,第一多晶硅层被由多晶硅掩模暴露的部分蚀刻,从而产生第一多晶硅层蚀刻轮廓,其中第一多晶硅层蚀刻轮廓基本上理想地是各向异性的并且独立于掩模轮廓。 然后在蚀刻的第一多晶硅层上形成绝缘层和导电层,然后蚀刻导电层的部分以形成字线。 然后在与字线相邻的区域中蚀刻绝缘层,从而沿着第一多晶硅层蚀刻轮廓留下基本垂直的绝缘栅栏。 最后,在与字线相邻的区域中再次蚀刻第一多晶硅层,其中第一多晶硅层的蚀刻基本上是各向异性的,并且在与字线相邻的区域中基本上除去所有的多晶硅,导致防止多晶硅。

    Reduction of ONO fence during self-aligned etch to eliminate poly
stringers
    5.
    发明授权
    Reduction of ONO fence during self-aligned etch to eliminate poly stringers 失效
    在自对准蚀刻期间减少ONO栅栏以消除多边形

    公开(公告)号:US5933729A

    公开(公告)日:1999-08-03

    申请号:US986953

    申请日:1997-12-08

    申请人: Maria Chow Chan

    发明人: Maria Chow Chan

    摘要: A method (200) of making a flash memory device without poly stringers includes forming a stacked gate region (202) on a substrate (102) and forming one or more word lines (122a, 122b, 204) in the stacked gate region. The method further includes performing a self-aligned etch (206) in regions adjacent to the one or more word lines (122a, 122b). The self-aligned etch (206) includes etching an insulating layer (110, 206a) with a relatively high insulating layer-to-polysilicon layer selectivity to thereby reduce the height of the resultant insulative fence (126). The self-aligned etch (206) then concludes with etching a polysilicon layer (106a, 106b); due to the reduced insulative fence (126), no poly stringers are formed during the etching of the polysilicon layer (106a, 106b).

    摘要翻译: 制造没有多晶桁架的闪速存储器件的方法(200)包括在衬底(102)上形成堆叠的栅极区(202),并在堆叠的栅区中形成一个或多个字线(122a,122b,204)。 该方法还包括在与一个或多个字线(122a,122b)相邻的区域中执行自对准蚀刻(206)。 自对准蚀刻(206)包括用相对高的绝缘层到多晶硅层选择性蚀刻绝缘层(110,206a),从而降低所得绝缘栅栏126的高度。 然后,自对准蚀刻(206)通过蚀刻多晶硅层(106a,106b)得出结论。 由于减小的绝缘栅栏(126),在多晶硅层(106a,106b)的蚀刻期间不形成多晶桁架。