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1.发明授权Sending thread message generated using DCR command pointed message control block storing message and response memory address in multiprocessor 失效发送使用DCR命令生成的线程消息指向消息控制块在多处理器中存储消息和响应存储器地址公开(公告)号：US07281118B2
公开(公告)日：2007-10-09
申请号：US11198042
申请日：2005-08-05
IPC分类号： G06F15/167
CPC分类号： G06F13/28
摘要： A method and system for messaging between processors and co-processors connected through a bus. The method permits a multi-thread system processor to request the services of a processor or co-processor located on the bus. Message control blocks are stored in a memory which identify the physical address of the target processor, as well as a memory location in the memory dedicated to the thread requesting the service. When the system processor requests service of a processor or co-processor, a DCR command is created pointing to the message control block. A message is built from information contained in the message control block or transferred to the processor or co-processor. The return address for the processor or co-processor message is concatenated with the thread number, so that the processor or co-processor can create a return message specifically identifying memory space dedicated to the requesting thread for storage of the response message.
摘要翻译： 用于通过总线连接的处理器和协处理器之间的消息传递的方法和系统。 该方法允许多线程系统处理器请求位于总线上的处理器或协处理器的服务。 消息控制块存储在识别目标处理器的物理地址的存储器中，以及专用于请求服务的线程的存储器中的存储器位置。 当系统处理器请求处理器或协处理器的服务时，创建指向消息控制块的DCR命令。 消息由消息控制块中包含的信息构建或传送到处理器或协处理器。 处理器或协处理器消息的返回地址与线程号连接，使得处理器或协处理器可以创建专用于识别请求线程的存储空间的返回消息以存储响应消息。
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2.发明授权Network processor with single interface supporting tree search engine and CAM 失效具有单界面支持树搜索引擎和CAM的网络处理器公开(公告)号：US07953077B2
公开(公告)日：2011-05-31
申请号：US11457952
申请日：2006-07-17
IPC分类号： H04L12/56
CPC分类号： H04L49/3009 , G11C15/00 , H04L45/745 , H04L45/7453 , H04L49/90
摘要： A method and system for identifying a data structure associated with a packet of data. A processor internal to a packet processor may extract one or more fields in a packet header field of a received packet of data to generate a search key. The internal processor may then be configured to select which table, e.g., routing table, quality of service table, filter table, needs to be accessed using the search key in order to process the received packet of data. A determination may then be made by the internal processor as to whether a CAM or a hash table and a Patricia Tree are used to identify the data structure associated with the received packet of data. Based on table definitions in a register, the internal processor may make such a determination.
摘要翻译： 一种用于识别与数据包相关联的数据结构的方法和系统。 分组处理器内部的处理器可以提取接收到的数据分组的分组报头字段中的一个或多个字段以生成搜索关键字。 然后可以将内部处理器配置为选择哪个表，例如路由表，服务质量表，过滤表，需要使用搜索关键字进行访问，以便处理接收的数据分组。 然后内部处理器可以确定CAM或散列表和Patricia Tree是否用于标识与所接收的数据分组相关联的数据结构。 根据寄存器中的表定义，内部处理器可以作出这样的确定。
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公开(公告)号：US07440417B2
公开(公告)日：2008-10-21
申请号：US10870730
申请日：2004-06-17
申请人： Anthony Matteo Gallo , Marco C. Heddes , Ross Boyd Leavens , Michael Steven Siegel , Jean Louis Calvignac , Gordon Taylor Davis
发明人： Anthony Matteo Gallo , Marco C. Heddes , Ross Boyd Leavens , Michael Steven Siegel , Jean Louis Calvignac , Gordon Taylor Davis
IPC分类号： H04L12/28
摘要： A system and method of protocol and frame classification in a system for data processing is disclosed, including, analyzing a portion of the, packet or frame according to predetermined tests, and storing characteristics of the packet for use in subsequent processing of the frame. The characteristics are preferably obtained with hardware, which does so quickly and in a uniform time period. The stored characteristics of the packet are then used by the network processing complexes in further processing of the frame. The processor is preconditioned with a starting instruction address or cede entry point and the location of the beginning of the layer 3 header as well as flags for the type of frame.
摘要翻译： 公开了一种用于数据处理的系统中的协议和帧分类的系统和方法，包括：根据预定的测试分析一部分数据包或帧，以及存储该数据包的特性以用于帧的后续处理。 这些特征优选地通过硬件获得，硬件在快速且均匀的时间周期内这样做。 然后，分组的存储特性由网络处理复合体用于帧的进一步处理。 处理器使用开始指令地址或者入门点进行预处理，并且第3层头的开始位置以及帧类型的标志。
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公开(公告)号：US06775284B1
公开(公告)日：2004-08-10
申请号：US09479027
申请日：2000-01-07
申请人： Jean Louis Calvignac , Gordon Taylor Davis , Anthony Matteo Gallo , Marco C. Heddes , Ross Boyd Leavens , Michael Steven Siegel
发明人： Jean Louis Calvignac , Gordon Taylor Davis , Anthony Matteo Gallo , Marco C. Heddes , Ross Boyd Leavens , Michael Steven Siegel
IPC分类号： H04L1256
摘要： A system and method of protocol and frame classification in a system for data processing (e.g., switching or routing data packets or frames). The present invention includes analyzing a portion of the packet or frame according to predetermined tests, then storing key characteristics of the packet for use in subsequent processing of the frame. The key characteristics for the frame (or input information unit, such as the type of layer 3 protocol used in the frame, the layer 2 encapsulation technique, the starting instruction address and flags indicating whether the frame uses a virtual local area network, preferably using hardware to quickly and in a uniform time period. The stored key characteristics of the packet are then used by the network processing complexes in its further processing of the frame. The processor is preconditioned with a starting instruction address and the location of the beginning of the layer 3 header as well as flags for the type of frame. That is, the instruction address or code entry point is used by the processor to start processing for a frame at the right place, based on the type of frame. Additionally, additional instruction addresses can be stacked and used sequentially at branches to avoid additional tests and branching instructions.
摘要翻译： 用于数据处理（例如，切换或路由数据分组或帧）的系统中的协议和帧分类的系统和方法。 本发明包括根据预定的测试来分析分组或帧的一部分，然后存储该分组的关键特征以用于该帧的后续处理。 帧（或输入信息单元，例如帧中使用的层3协议的类型，第2层封装技术，起始指令地址和指示帧是否使用虚拟局域网的标志）的关键特性，优选地使用 硬件在快速和统一的时间段内，存储的密钥特性随后由网络处理复合体在帧的进一步处理中被使用，处理器使用起始指令地址和开始指令的位置进行预处理 第3层标题以及帧类型的标志，即处理器使用指令地址或代码入口点，根据帧类型对正确位置的帧开始处理，另外附加指令 地址可以在分支上顺序堆叠和使用，以避免额外的测试和分支指令。
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5.发明授权Network processor with single interface supporting tree search engine and CAM 失效具有单界面支持树搜索引擎和CAM的网络处理器公开(公告)号：US07167471B2
公开(公告)日：2007-01-23
申请号：US09940758
申请日：2001-08-28
IPC分类号： H04L12/56
CPC分类号： H04L49/3009 , G11C15/00 , H04L45/745 , H04L45/7453 , H04L49/90
摘要： A method and system for identifying a data structure associated with a packet of data. A processor internal to a packet processor may extract one or more fields in a packet header field of a received packet of data to generate a search key. The internal processor may then be configured to select which table, e.g., routing table, quality of service table, filter table, needs to be accessed using the search key in order to process the received packet of data. A determination may then be made by the internal processor as to whether a CAM or a hash table and a Patricia Tree are used to identify the data structure associated with the received packet of data. Based on table definitions in a register, the internal processor may make such a determination.
摘要翻译： 一种用于识别与数据包相关联的数据结构的方法和系统。 分组处理器内部的处理器可以提取接收到的数据分组的分组报头字段中的一个或多个字段以生成搜索关键字。 然后可以将内部处理器配置为选择哪个表，例如路由表，服务质量表，过滤表，需要使用搜索关键字进行访问，以便处理接收的数据分组。 然后内部处理器可以确定CAM或散列表和Patricia Tree是否用于标识与所接收的数据分组相关联的数据结构。 根据寄存器中的表定义，内部处理器可以作出这样的确定。
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公开(公告)号：US08130650B2
公开(公告)日：2012-03-06
申请号：US12174999
申请日：2008-07-17
申请人： James Johnson Allen, Jr. , Brian Mitchell Bass , Gordon Taylor Davis , Clark Debs Jeffries , Jitesh Ramachandran Nair , Ravinder Kumar Sabhikhi , Michael Steven Siegel , Rama Mohan Yedavalli
发明人： James Johnson Allen, Jr. , Brian Mitchell Bass , Gordon Taylor Davis , Clark Debs Jeffries , Jitesh Ramachandran Nair , Ravinder Kumar Sabhikhi , Michael Steven Siegel , Rama Mohan Yedavalli
IPC分类号： H04L12/26
摘要： The decision within a packet processing device to transmit a newly arriving packet into a queue to await further processing or to discard the same packet is made by a flow control method and system. The flow control is updated with a constant period determined by storage and flow rate limits. The update includes comparing current queue occupancy to a threshold. The outcome of the update is adjustment up or down of the transmit probability value. The value is stored for the subsequent period of flow control and packets arriving during that period are subject to a transmit or discard decision that uses that value.
摘要翻译： 通过流控制方法和系统，在分组处理设备内决定将新到达的分组发送到队列中等待进一步处理或丢弃相同的分组。 流量控制以由存储和流量限制确定的恒定周期进行更新。 该更新包括将当前队列占用率与阈值进行比较。 更新的结果是传输概率值的上调或下调。 该值存储在随后的流量控制周期中，并且在该时间段期间到达的分组经受使用该值的发送或丢弃决定。
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公开(公告)号：US20080273464A1
公开(公告)日：2008-11-06
申请号：US12174999
申请日：2008-07-17
申请人： James Johnson Allen , Brian Mitchell Bass , Gordon Taylor Davis , Clark Debs Jeffries , Jitesh Ramachandran Nair , Ravinder Kumar Sabhikhi , Michael Steven Siegel , Rama Mohan Yedavalli
发明人： James Johnson Allen , Brian Mitchell Bass , Gordon Taylor Davis , Clark Debs Jeffries , Jitesh Ramachandran Nair , Ravinder Kumar Sabhikhi , Michael Steven Siegel , Rama Mohan Yedavalli
IPC分类号： H04L12/24
摘要： The decision within a packet processing device to transmit a newly arriving packet into a queue to await further processing or to discard the same packet is made by a flow control method and system. The flow control is updated with a constant period determined by storage and flow rate limits. The update includes comparing current queue occupancy to a threshold. The outcome of the update is adjustment up or down of the transmit probability value. The value is stored for the subsequent period of flow control and packets arriving during that period are subject to a transmit or discard decision that uses that value.
摘要翻译： 通过流控制方法和系统，在分组处理设备内决定将新到达的分组发送到队列中等待进一步处理或丢弃相同的分组。 流量控制以由存储和流量限制确定的恒定周期进行更新。 该更新包括将当前队列占用率与阈值进行比较。 更新的结果是传输概率值的上调或下调。 该值存储在随后的流量控制周期中，并且在该时间段期间到达的分组经受使用该值的发送或丢弃决定。
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公开(公告)号：US07430169B2
公开(公告)日：2008-09-30
申请号：US10161000
申请日：2002-06-03
申请人： James Johnson Allen, Jr. , Brian Mitchell Bass , Gordon Taylor Davis , Clark Debs Jeffries , Jitesh Ramachandran Nair , Ravinder Kumar Sabhikhi , Michael Steven Siegel , Rama Mohan Yedavalli
发明人： James Johnson Allen, Jr. , Brian Mitchell Bass , Gordon Taylor Davis , Clark Debs Jeffries , Jitesh Ramachandran Nair , Ravinder Kumar Sabhikhi , Michael Steven Siegel , Rama Mohan Yedavalli
IPC分类号： H04L12/54
摘要： The decision within a packet processing device to transmit a newly arriving packet into a queue to await further processing or to discard the same packet is made by a flow control method and system. The flow control is updated with a constant period determined by storage and flow rate limits. The update includes comparing current queue occupancy to a threshold. The outcome of the update is adjustment up or down of the transmit probability value. The value is stored for the subsequent period of flow control and packets arriving during that period are subject to a transmit or discard decision that uses that value.
摘要翻译： 通过流控制方法和系统，在分组处理设备内决定将新到达的分组发送到队列中等待进一步处理或丢弃相同的分组。 流量控制以由存储和流量限制确定的恒定周期进行更新。 该更新包括将当前队列占用率与阈值进行比较。 更新的结果是传输概率值的上调或下调。 该值存储在随后的流量控制周期中，并且在该时间段期间到达的分组经受使用该值的发送或丢弃决定。
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公开(公告)号：US20120246406A1
公开(公告)日：2012-09-27
申请号：US13488215
申请日：2012-06-04
申请人： Gordon Bernard Bell , Gordon Taylor Davis , Jeffrey Haskell Derby , Anil Krishna , Srinivasan Ramani , Ken Vu , Steve Woolet
发明人： Gordon Bernard Bell , Gordon Taylor Davis , Jeffrey Haskell Derby , Anil Krishna , Srinivasan Ramani , Ken Vu , Steve Woolet
IPC分类号： G06F12/08
CPC分类号： G06F12/0862 , G06F12/0831 , G06F2212/6026
摘要： A processing system includes a memory and a first core configured to process applications. The first core includes a first cache. The processing system includes a mechanism configured to capture a sequence of addresses of the application that miss the first cache in the first core and to place the sequence of addresses in a storage array; and a second core configured to process at least one software algorithm. The at least one software algorithm utilizes the sequence of addresses from the storage array to generate a sequence of prefetch addresses. The second core issues prefetch requests for the sequence of the prefetch addresses to the memory to obtain prefetched data and the prefetched data is provided to the first core if requested.
摘要翻译： 处理系统包括被配置为处理应用的存储器和第一核心。 第一个核心包括第一个缓存。 处理系统包括被配置为捕获错过第一核心中的第一高速缓存的应用程序的地址序列并将地址序列放置在存储阵列中的机制; 以及被配置为处理至少一个软件算法的第二核心。 所述至少一个软件算法利用来自存储阵列的地址序列来生成预取地址序列。 第二个核心将预取地址序列的预取请求发送到存储器以获得预取数据，并且如果请求，则将预取数据提供给第一核。
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公开(公告)号：US07916656B2
公开(公告)日：2011-03-29
申请号：US11842891
申请日：2007-08-21
申请人： Gordon Taylor Davis
发明人： Gordon Taylor Davis
IPC分类号： H04L12/28
CPC分类号： H04L29/12132 , H04L29/06 , H04L45/742 , H04L45/745 , H04L61/1552 , H04L69/327
摘要： A method and system for identifying sessions in a computer network is disclosed. The session is between a first computer system and a second computer system. The session consists of an exchange of a plurality of packets between the computer systems. Each of the packets includes source information and destination information relating to the first computer system and the second computer system. The method and system include providing a symmetric key and identifying the session using the symmetric key. The symmetric key is provided utilizing a manipulation of the source information and the destination information. The symmetric key is associated with the plurality of packets traveling between the first computer system and the second computer system.
摘要翻译： 公开了一种用于识别计算机网络中的会话的方法和系统。 会话在第一计算机系统和第二计算机系统之间。 会话由计算机系统之间的多个分组的交换组成。 每个分组包括与第一计算机系统和第二计算机系统相关的源信息和目的地信息。 该方法和系统包括提供对称密钥并使用对称密钥来识别会话。 使用对源信息和目的地信息的操纵来提供对称密钥。 对称密钥与在第一计算机系统和第二计算机系统之间行进的多个分组相关联。
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