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1.发明授权Method and apparatus for setting the operating parameters of a computer system 失效用于设置计算机系统的操作参数的方法和装置
公开(公告)号：US6047373A
公开(公告)日：2000-04-04
申请号：US940636
申请日：1997-09-30
申请人： Jerald N. Hall , Orville H. Christeson , Mike Kinion , Sean R. Babcock , Frank L. Wildgrube , Frank E. LeClerg , John Yuratovac
发明人： Jerald N. Hall , Orville H. Christeson , Mike Kinion , Sean R. Babcock , Frank L. Wildgrube , Frank E. LeClerg , John Yuratovac
CPC分类号： G06F9/4401 , G06F11/1433 , G06F13/10 , G06F13/4068
摘要： An apparatus includes a configuration selector that is selectively configurable to denote one of a plurality of operating modes for the apparatus, including a configuration mode. The apparatus further comprising a programmable multiplexer, a processor, a bus, and a storage medium having stored therein a basic input/output system (BIOS) equipped to operate in any one of the plurality of operating modes, including the configuration mode wherein the BIOS facilitates user programming of a plurality of operating parameters for the apparatus. The programmable multiplexer, responsive to the configuration selector, asserts a default bus/core ratio common to a plurality of processors and buses that can be employed to form the apparatus when the configuration selector is configured to denote the configuration mode of operation. The processor, coupled to the storage medium and the programmable multiplexer, operates to execute the BIOS, in a speed consistent with the asserted bus/core ratio. The bus, coupled to the programmable multiplexer, the processor and the storage medium, operates to provide instructions and data to the processor, including the BIOS, in a speed consistent with the asserted bus/core ratio.
摘要翻译： 一种装置包括配置选择器，其被选择性地配置为表示该设备的多种操作模式中的一种，包括配置模式。 该装置还包括可编程多路复用器，处理器，总线和存储介质，其中存储有配置为以多种操作模式中的任一种操作的基本输入/输出系统（BIOS），包括其中BIOS 便于用户编程设备的多个操作参数。 响应于配置选择器，可编程多路复用器断言当配置选择器配置为表示配置操作模式时，可以用于形成设备的多个处理器和总线公共的默认总线/内核比。 耦合到存储介质和可编程多路复用器的处理器以与断言的总线/内核比率一致的速度操作以执行BIOS。 耦合到可编程多路复用器，处理器和存储介质的总线，以与断言的总线/内核比率一致的速度来操作以向处理器（包括BIOS）提供指令和数据。
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2.发明授权Method and apparatus for setting the operating parameters of a computer system 有权用于设置计算机系统的操作参数的方法和装置公开(公告)号：US06256731B1
公开(公告)日：2001-07-03
申请号：US09440150
申请日：1999-11-15
申请人： Jerald N. Hall , Orville H. Christeson , Mike Kinion , Sean R. Babcock , Frank L. Wildgrube , Frank E. LeClerg , John Yuratovac
发明人： Jerald N. Hall , Orville H. Christeson , Mike Kinion , Sean R. Babcock , Frank L. Wildgrube , Frank E. LeClerg , John Yuratovac
IPC分类号： G06F900
CPC分类号： G06F9/4401 , G06F11/1433 , G06F13/10 , G06F13/4068
摘要： An apparatus includes a configuration selector that is selectively configurable to denote one of a plurality of operating modes for the apparatus, including a configuration mode. The apparatus further comprising a programmable multiplexer, a processor, a bus, and a storage medium having stored therein a basic input/output system (BIOS) equipped to operate in any one of the plurality of operating modes, including the configuration mode wherein the BIOS facilitates user programming of a plurality of operating parameters for the apparatus. The programmable multiplexer, responsive to the configuration selector, asserts a default bus/core ratio common to a plurality of processors and buses that can be employed to form the apparatus when the configuration selector is configured to denote the configuration mode of operation. The processor, coupled to the storage medium and the programmable multiplexer, operates to execute the BIOS, in a speed consistent with the asserted bus/core ratio. The bus, coupled to the programmable multiplexer, the processor and the storage medium, operates to provide instructions and data to the processor, including the BIOS, in a speed consistent with the asserted bus/core ratio.
摘要翻译： 一种装置包括配置选择器，其被选择性地配置为表示该设备的多种操作模式中的一种，包括配置模式。 该装置还包括可编程多路复用器，处理器，总线和存储介质，其中存储有配置为以多种操作模式中的任一种操作的基本输入/输出系统（BIOS），其包括配置模式，其中BIOS 便于用户编程设备的多个操作参数。 响应于配置选择器，可编程多路复用器断言当配置选择器配置为表示配置操作模式时，可以用于形成设备的多个处理器和总线公共的默认总线/内核比。 耦合到存储介质和可编程多路复用器的处理器以与断言的总线/内核比率一致的速度操作以执行BIOS。 耦合到可编程多路复用器，处理器和存储介质的总线，以与断言的总线/内核比率一致的速度来操作以向处理器（包括BIOS）提供指令和数据。
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公开(公告)号：US6122733A
公开(公告)日：2000-09-19
申请号：US941535
申请日：1997-09-30
申请人： Orville H. Christeson , Frank L. Wildgrube , Frank E. LeClerg , Jerald Nevin Hall , Mike Kinion , Sean R. Babcock , John Yuratovac
发明人： Orville H. Christeson , Frank L. Wildgrube , Frank E. LeClerg , Jerald Nevin Hall , Mike Kinion , Sean R. Babcock , John Yuratovac
CPC分类号： G06F11/1433 , G06F13/10 , G06F13/4068 , G06F9/4401
摘要： An apparatus includes a storage medium having stored therein a segmented basic input/output system (BIOS) divided among a plurality of segments within the storage medium, and a processor operative to execute the segmented BIOS. In accordance with the teachings of the present invention, the BIOS includes a recovery function that is mode dependent in that while the apparatus is in an update mode the recovery function executes a full reflash of all relevant segments of the segmented BIOS, whereas while the apparatus is in a normal mode the recovery function executes a partial reflash of only identified corrupted BIOS segments.
摘要翻译： 一种设备包括存储介质，其中存储有分段的基本输入/输出系统（BIOS），所述基本输入/输出系统（BIOS）被划分为存储介质内的多个段，以及处理器，用于执行分段的BIOS。 根据本发明的教导，BIOS包括恢复功能，该恢复功能的模式取决于当设备处于更新模式时，恢复功能执行分段BIOS的所有相关段的完全重新擦除，而在该设备 处于正常模式下，恢复功能执行仅识别的损坏的BIOS段的部分刷新。
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公开(公告)号：US5579522A
公开(公告)日：1996-11-26
申请号：US505995
申请日：1995-07-24
CPC分类号： G06F8/67 , G06F11/1433 , G06F8/65
摘要： A computer system wherein a portion of code/data stored in a non-volatile memory device can be dynamically modified or updated without removing any covers or parts from the computer system. The computer system of the preferred embodiment includes a flash memory component coupled to a computer system bus for storing non-volatile code and data. Using the present invention, the contents of a portion of the flash memory may be replaced, modified, updated, or reprogrammed without the need for removing and/or replacing any computer system hardware components. The flash memory device used in the preferred embodiment contains four separately erasable/programmable non-symmetrical blocks of memory. One of these four blocks may be electronically locked to prevent erasure or modification of its contents once it is installed. This configuration allows the processing logic of the computer system to update or modify any selected block of memory without affecting the contents of other blocks. One memory block contains a normal BIOS. An electronically protected flash memory area is used for storage of a recovery BIOS which is used for recovery operations. The present invention also includes hardware for selecting one of the two available update modes: normal or recovery. Thus, using a mode selection apparatus, either a normal system BIOS or a recovery BIOS may be activated.
摘要翻译： 一种计算机系统，其中存储在非易失性存储器设备中的代码/数据的一部分可以被动态地修改或更新，而不用从计算机系统中移除任何盖子或部件。 优选实施例的计算机系统包括耦合到计算机系统总线的闪存组件，用于存储非易失性代码和数据。 使用本发明，可以更换，修改，更新或重新编程闪存的一部分的内容，而不需要移除和/或替换任何计算机系统硬件组件。 在优选实施例中使用的闪存器件包含四个可分离的可擦除/可编程非对称的存储器块。 这四个块中的一个可以被电子锁定，以防止其被安装后的内容的擦除或修改。 该配置允许计算机系统的处理逻辑更新或修改任何选定的存储块，而不影响其他块的内容。 一个内存块包含一个普通的BIOS。 电子保护的闪存区域用于存储用于恢复操作的恢复BIOS。 本发明还包括用于选择两种可用更新模式之一的硬件：正常或恢复。 因此，使用模式选择装置，可以激活正常系统BIOS或恢复BIOS。
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公开(公告)号：US5852736A
公开(公告)日：1998-12-22
申请号：US623930
申请日：1996-03-28
CPC分类号： G06F12/1466
摘要： A method and apparatus for protecting data using lock values in a computer system includes indicating that the computer system does not support locked accesses to the data. However, upon receipt of a request to write to the storage area where the data is contained, the present invention checks whether a lock value corresponding to the request matches a predetermined lock value. If the lock value matches the predetermined lock value, then the data is written to the storage area; otherwise, the storage area is left unmodified.
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公开(公告)号：US5913057A
公开(公告)日：1999-06-15
申请号：US768644
申请日：1996-12-18
CPC分类号： G06F12/1466
摘要： A request is received from a caller to perform a read of data from a storage area of a computer system, the data having master header data in a header portion. The master header data is replaced with alternate header data before returning the data to the caller. The data, including the alternate header data, is returned to the caller. A request is received from the caller to perform a write of caller data to the storage area, the caller data having caller header data in a header portion of the caller data. The write of caller data is allowed only if the caller header data is identical to the master header data.
摘要翻译： 从呼叫者接收到从计算机系统的存储区域读取数据的请求，该数据具有标题部分中的主标题数据。 在将数据返回给呼叫者之前，主头数据被备用头数据替换。 包括备用标题数据的数据将返回给调用者。 从呼叫者接收到请求以执行向存储区域的呼叫者数据的写入，主叫用户数据在呼叫者数据的报头部分中具有主叫头部数据。 仅当主叫头数据与主标题数据相同时才允许写入呼叫者数据。
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公开(公告)号：US5901311A
公开(公告)日：1999-05-04
申请号：US768643
申请日：1996-12-18
CPC分类号： G06F12/1466
摘要： A status parameter is set for a storage area of a computer system to a read-only status. An access key is received from an access key call by a caller. The status parameter is changed to a write-permissible status if the access key matches a master access key. A request to perform a write to the storage area is received, and the write is allowed only if the status parameter has been set to the write-permissible status. The status parameter is reset to the read-only status after the write is performed.
摘要翻译： 将计算机系统的存储区域的状态参数设置为只读状态。 从呼叫者的访问密钥呼叫接收访问密钥。 如果访问密钥与主访问密钥相匹配，状态参数将更改为写允许状态。 接收对存储区域进行写入的请求，只有当状态参数被设置为写允许状态时才允许写入。 执行写入后，状态参数将复位为只读状态。
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公开(公告)号：US06536038B1
公开(公告)日：2003-03-18
申请号：US09450832
申请日：1999-11-29
IPC分类号： G06F944
摘要： A method for updating firmware. The method includes providing replaceable information in a non-modifiable storage and replacement information in a modifiable storage or a removable storage and providing a replacement indicator. The replacement information is accessed instead of the replaceable information based upon the replacement indicator.
摘要翻译： 一种更新固件的方法。 该方法包括在可修改的存储或可移动存储器中提供不可修改的存储和替换信息中的可替换信息，并提供替换指示符。 访问替换信息而不是基于替换指示符的可替换信息。
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公开(公告)号：US5901285A
公开(公告)日：1999-05-04
申请号：US769227
申请日：1996-12-18
IPC分类号： G06F12/14
CPC分类号： G06F12/1466
摘要： A request to erase a storage area of a computer system is received via an erase call by a caller, the erase call containing an erasure key. The storage area is erased only if the erasure key matches a master erasure key corresponding to the storage area. A request is received to perform a write to the storage area, and the write is allowed only if the storage area has been erased.
摘要翻译： 擦除计算机系统的存储区域的请求经由呼叫者的擦除接收，擦除呼叫包含擦除键。 仅当擦除键与存储区域对应的主擦除键匹配时才能擦除存储区域。 接收到对存储区域进行写入的请求，只有当存储区域被擦除时才允许写入。
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公开(公告)号：US5479639A
公开(公告)日：1995-12-26
申请号：US279692
申请日：1994-08-26
CPC分类号： G06F12/0623 , G06F2212/2022
摘要： A computer system wherein a paging technique is used to expand the useable non-volatile memory capacity beyond a fixed address space limitation. The computer system of the preferred embodiment includes a flash memory component for storing non-volatile code and data including a system BIOS in the upper 128K of memory. The useful BIOS memory space is effectively increased while maintaining the address boundary of the upper 128K region. The address space of the non-volatile memory device is logically separated into distinct pages of memory (Pages 1-4). Using the apparatus and techniques of the present invention, Page 1, Page 3 and Page 4 may be individually swapped into the address space originally occupied by Page 1 (the swappable page area). In the preferred embodiment, Page 2 is held static and thus is not used as a swap area. Each of the swappable pages, Page 1, Page 3, and Page 4, contain processing logic called swapping logic used during the swapping or paging operation. The swapping logic operates in conjunction with paging hardware to effect the swapping of pages into the swappable page area. The high order processor address lines are input by a page decoder. The page decoder is used to modify the address actually presented to the non-volatile memory device. A page register provides a means by which the processor may select a page in non-volatile memory. In an alternative embodiment of the present invention, several different forms of configuration or identification information may be stored in a page of non-volatile memory.
摘要翻译： 一种计算机系统，其中使用寻呼技术来扩展可用的非易失性存储器容量超过固定的地址空间限制。 优选实施例的计算机系统包括用于存储非易失性代码的闪存组件和包括存储器的上部128K中的系统BIOS的数据。 有效地增加了有用的BIOS存储器空间，同时保持了上128K区域的地址边界。 非易失性存储器件的地址空间在逻辑上分成不同的存储器页（1-4页）。 使用本发明的装置和技术，第1页，第3页和第4页可以单独交换到原来由第1页（可交换页面区域）占用的地址空间中。 在优选实施例中，保持静止，因此不用作交换区域。 每个可交换页面，第1页，第3页和第4页都包含称为在交换或寻呼操作期间使用的交换逻辑的处理逻辑。 交换逻辑与分页硬件一起运行，以实现将页面交换到可交换页面区域。 高阶处理器地址线由页解码器输入。 页面解码器用于修改实际呈现给非易失性存储器件的地址。 页面寄存器提供了处理器可以在非易失性存储器中选择页面的手段。 在本发明的替代实施例中，可以将多种不同形式的配置或识别信息存储在非易失性存储器的页面中。
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