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公开(公告)号：US10169072B2
公开(公告)日：2019-01-01
申请号：US12853161
申请日：2010-08-09
摘要： A method for providing state inheritance across command lists in a multi-threaded processing environment. The method includes receiving an application program that includes a plurality of parallel threads; generating a command list for each thread of the plurality of parallel threads; causing a first command list associated with a first thread of the plurality of parallel threads to be executed by a processing unit; and causing a second command list associated with a second thread of the plurality of parallel threads to be executed by the processing unit, where the second command list inherits from the first command list state associated with the processing unit.
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公开(公告)号：US08922555B2
公开(公告)日：2014-12-30
申请号：US12898998
申请日：2010-10-06
IPC分类号： G06T15/00
CPC分类号： G06T15/005
摘要： One embodiment of the present invention sets forth a technique for storing only the enabled components for each enabled vector and writing only enabled components to one or more specified render targets. A shader program header (SPH) file provides per-component mask bits for each render target. Each enabled mask bit indicates that the pixel shader generates the corresponding component as an output to the raster operations unit. In the hardware, the per-component mask bits are combined with the applications programming interface (API)-level per-component write masks to determine the components that are updated by the shader program. The combined mask is used as the write enable bits for components in one or more render targets. One advantage of the combined mask is that the components that are not updated are not forwarded from the pixel shader to the ROP, thereby saving bandwidth between those processing units.
摘要翻译： 本发明的一个实施例提出了一种用于仅存储每个启用向量的启用组件并仅将启用的组件写入一个或多个指定的渲染目标的技术。 着色器程序头（SPH）文件为每个渲染目标提供每个组件掩码位。 每个启用的屏蔽位指示像素着色器生成相应的组件作为光栅操作单元的输出。 在硬件中，每个组件掩码位与应用程序编程接口（API）级的每个组件写入掩码相结合，以确定由着色器程序更新的组件。 组合掩码用作一个或多个渲染目标中的组件的写使能位。 组合掩码的一个优点是未更新的组件不会从像素着色器转发到ROP，从而节省了这些处理单元之间的带宽。
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公开(公告)号：US08786618B2
公开(公告)日：2014-07-22
申请号：US12899431
申请日：2010-10-06
申请人： Jerome F. Duluk, Jr. , Jesse David Hall , Patrick R. Brown , Gernot Schaufler , Mark D. Stadler
发明人： Jerome F. Duluk, Jr. , Jesse David Hall , Patrick R. Brown , Gernot Schaufler , Mark D. Stadler
IPC分类号： G06T1/00
CPC分类号： G06T15/005
摘要： One embodiment of the present invention sets forth a technique for configuring a graphics processing pipeline (GPP) to process data according to one or more shader programs. The method includes receiving a plurality of pointers, where each pointer references a different shader program header (SPH) included in a plurality of SPHs, and each SPH is associated with a different shader program that executes within the GPP. For each SPH included in the plurality of SPHs, one or more GPP configuration parameters included in the SPH are identified, and the GPP is adjusted based on the one or more GPP configuration parameters.
摘要翻译： 本发明的一个实施例提出了一种用于配置图形处理流水线（GPP）以根据一个或多个着色器程序处理数据的技术。 该方法包括接收多个指针，其中每个指针引用包括在多个SPH中的不同着色器程序头（SPH），并且每个SPH与在GPP内执行的不同着色器程序相关联。 对于包括在多个SPH中的每个SPH，识别包括在SPH中的一个或多个GPP配置参数，并且基于一个或多个GPP配置参数来调整GPP。
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公开(公告)号：US09275491B2
公开(公告)日：2016-03-01
申请号：US13078878
申请日：2011-04-01
申请人： Jeffrey A. Bolz , Jesse David Hall , Jerome F. Duluk, Jr. , Patrick R. Brown , Gregory Scott Palmer
发明人： Jeffrey A. Bolz , Jesse David Hall , Jerome F. Duluk, Jr. , Patrick R. Brown , Gregory Scott Palmer
CPC分类号： G06T15/005 , G06F9/3009 , G06F9/3851 , G06F9/3879 , G06F9/3891 , G06T1/00 , G06T1/60 , G06T15/80
摘要： One embodiment of the present invention sets forth a method for generating work to be processed by a graphics pipeline residing within a graphics processor. The method includes the steps of receiving an indication that a first graphics workload is to be submitted to a command queue associated with the graphics processor, allocating a first portion of shader accessible memory for one or more units of state information that are necessary for processing the first graphics workload, populating the first portion of shader accessible memory with the one or more units of state information, and transmitting to the command queue of the graphics processor the one or more units of state information stored within the first portion of shader accessible memory, wherein the first graphics workload is processed within the graphics pipeline based on the one or more units of state information.
摘要翻译： 本发明的一个实施例提出了一种用于产生要由位于图形处理器内的图形管线处理的工作的方法。 该方法包括以下步骤：接收将要向第一图形工作负载提交到与图形处理器相关联的命令队列的指示，为处理所述图形处理所需的一个或多个状态信息单元分配着色器可访问存储器的第一部分 第一图形工作负载，用一个或多个状态信息单元填充着色器可访问存储器的第一部分，以及向存储在着色器可访问存储器的第一部分内的一个或多个状态信息单元传送到图形处理器的命令队列， 其中基于所述一个或多个状态信息单元在所述图形流水线内处理所述第一图形工作负载。
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公开(公告)号：US08085275B1
公开(公告)日：2011-12-27
申请号：US11314875
申请日：2005-12-20
摘要： A push buffer-related system, method and computer program product are provided. Initially, an entry is obtained from a buffer storage describing a size and location of a portion of a push buffer. To this end, the portion of the push buffer is capable of being retrieved, utilizing the entry from the buffer storage.
摘要翻译： 提供了与缓存相关的系统，方法和计算机程序产品。 最初，从描述推送缓冲器的一部分的大小和位置的缓冲存储器获得条目。 为此，可以利用来自缓冲存储器的条目来检索推送缓冲器的部分。
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公开(公告)号：US09965321B2
公开(公告)日：2018-05-08
申请号：US13316344
申请日：2011-12-09
CPC分类号： G06F9/4843
摘要： One embodiment of the present invention sets forth a technique for error-checking a compute task. The technique involves receiving a pointer to a compute task, storing the pointer in a scheduling queue, determining that the compute task should be executed, retrieving the pointer from the scheduling queue, determining via an error-check procedure that the compute task is eligible for execution, and executing the compute task.
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公开(公告)号：US08766988B2
公开(公告)日：2014-07-01
申请号：US12899454
申请日：2010-10-06
CPC分类号： G06T1/20 , G06F9/30087 , G06F9/3851 , G06F9/3887
摘要： One embodiment of the present invention sets forth a technique for providing state information to one or more shader engines within a processing pipeline. State information received from an application accessing the processing pipeline is stored in constant buffer memory accessible to each of the shader engines. The shader engines can then retrieve the state information during execution.
摘要翻译： 本发明的一个实施例提出了一种用于向处理流水线内的一个或多个着色引擎提供状态信息的技术。 从访问处理流水线的应用程序接收到的状态信息存储在每个着色引擎可访问的恒定缓冲存储器中。 着色器引擎可以在执行期间检索状态信息。
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公开(公告)号：US09710306B2
公开(公告)日：2017-07-18
申请号：US13442730
申请日：2012-04-09
CPC分类号： G06F9/4881 , G06F9/5016 , G06F2209/483
摘要： Systems and methods for auto-throttling encapsulated compute tasks. A device driver may configure a parallel processor to execute compute tasks in a number of discrete throttled modes. The device driver may also allocate memory to a plurality of different processing units in a non-throttled mode. The device driver may also allocate memory to a subset of the plurality of processing units in each of the throttling modes. Data structures defined for each task include a flag that instructs the processing unit whether the task may be executed in the non-throttled mode or in the throttled mode. A work distribution unit monitors each of the tasks scheduled to run on the plurality of processing units and determines whether the processor should be configured to run in the throttled mode or in the non-throttled mode.
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公开(公告)号：US08330766B1
公开(公告)日：2012-12-11
申请号：US12340496
申请日：2008-12-19
申请人： David Kirk McAllister , Steven E. Molnar , Jerome F. Duluk, Jr. , Emmett M. Kilgariff , Patrick R. Brown , Christian Johannes Amsinck , James Michael O'Connor , John Matthew Burgess , Gregory Alan Muthler , James Robertson
发明人： David Kirk McAllister , Steven E. Molnar , Jerome F. Duluk, Jr. , Emmett M. Kilgariff , Patrick R. Brown , Christian Johannes Amsinck , James Michael O'Connor , John Matthew Burgess , Gregory Alan Muthler , James Robertson
CPC分类号： G09G5/39 , G09G5/363 , G09G2360/06 , G09G2360/121 , G09G2360/122
摘要： A system and method for performing zero-bandwidth-clears reduces external memory accesses by a graphics processor when performing clears and subsequent read operations. A set of clear values is stored in the graphics processor. Each region of a color or z buffer may be configured using a zero-bandwidth-clear command to reference a clear value without writing the external memory. The clear value is provided to a requestor without accessing the external memory when a read access is performed.
摘要翻译： 执行零带宽清除的系统和方法在执行清除和后续读取操作时减少图形处理器的外部存储器访问。 一组清晰的值存储在图形处理器中。 可以使用零带宽清除命令来配置颜色或z缓冲区的每个区域以引用清除值而不写入外部存储器。 当执行读取访问时，清除值被提供给请求者而不访问外部存储器。
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公开(公告)号：US09589310B2
公开(公告)日：2017-03-07
申请号：US12898624
申请日：2010-10-05
CPC分类号： G06T1/20 , G06F9/3851 , G06F9/3887 , G06T15/005 , G06T2210/04 , G06T2210/52
摘要： One embodiment of the present invention sets forth a technique for splitting a set of vertices into a plurality of batches for processing. The method includes receiving one or more primitives each containing an associated set of vertices. For each of the one or more primitives, one or more vertices are gathered from the set of vertices, the vertices are arranged into one or more batches, the batch is routed to a processing pipeline line to process each batch as a separate primitive, and the one or more batches are processed to produce results identical to those of processing the entire primitive as a single entity.
摘要翻译： 本发明的一个实施例提出了一种用于将一组顶点分割成多个批次以进行处理的技术。 该方法包括接收一个或多个每个包含相关联的顶点集的基元。 对于一个或多个基元中的每一个，从顶点集合中收集一个或多个顶点，将顶点排列成一个或多个批次，批次被路由到处理流水线，以将每个批处理作为单独的原语处理，以及 处理一个或多个批次以产生与作为单个实体处理整个原语的结果相同的结果。
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