Apparatus for molding a semiconductor wafer and process therefor
    1.
    发明申请
    Apparatus for molding a semiconductor wafer and process therefor 有权
    用于模制半导体晶片的设备及其工艺

    公开(公告)号:US20050064065A1

    公开(公告)日:2005-03-24

    申请号:US10491687

    申请日:2002-10-04

    摘要: Mold pieces (105 and 110) for molding a layer of mold compound on the interconnect side of a bumped semiconductor wafer (118) include a primary cavity (117) and secondary cavities (120) into which excess mold compound from the primary cavity (117) flows. The secondary cavities (120) include a plunger (130) that asserts a predetermined backpressure that is equal to a desired mold compound pressure on the mold compound during molding. As most of the excess mold compound in the primary cavity (117) is forced to flow into the secondary cavities (120), this advantageously leaves a relatively thin layer of mold compound on the semiconductor wafer (118), which can then be removed, for example by grinding in a relatively short time. Mould piece (105) further comprises a movable cavity bar (115) that can be moved away from mould piece (105) after molding and be cooled to detach the molded substrate that adheres to the cavity bar.

    摘要翻译: 用于在凸起的半导体晶片(118)的互连侧上模制模制化合物层的模具(105和110)包括:主空腔(117)和次级空腔(120),多个模制化合物从初级腔 )流。 辅助空腔(120)包括柱塞(130),其确定在模制期间等于模具化合物上期望的模具复合压力的预定背压。 由于主空腔(117)中的大多数多余的模制化合物被迫流入次级空腔(120),这有利地在半导体晶片(118)上留下相对薄的模制化合物层,然后可以将其去除, 例如通过在相对短的时间内研磨。 模具(105)还包括可移动的空腔棒(115),其可以在模制之后移动离开模具(105)并被冷却以分离粘附到空腔棒的模制基底。

    Apparatus for molding a semiconductor wafer and process therefor
    2.
    发明授权
    Apparatus for molding a semiconductor wafer and process therefor 有权
    用于模制半导体晶片的设备及其工艺

    公开(公告)号:US08791583B2

    公开(公告)日:2014-07-29

    申请号:US10491687

    申请日:2002-10-04

    IPC分类号: H01L23/29

    摘要: Mold pieces (105 and 110) for molding a layer of mold compound on the interconnect side of a bumped semiconductor wafer (118) include a primary cavity (117) and secondary cavities (120) into which excess mold compound from the primary cavity (117) flows. The secondary cavities (120) include a plunger (130) that asserts a predetermined backpressure that is equal to a desired mold compound pressure on the mold compound during molding. As most of the excess mold compound in the primary cavity (117) is forced to flow into the secondary cavities (120), this advantageously leaves a relatively thin layer of mold compound on the semiconductor wafer (118), which can then be removed, for example by grinding in a relatively short time. Mold piece (105) further comprises a movable cavity bar (115) that can be moved away from mold piece (105) after molding and be cooled to detach the molded substrate that adheres to the cavity bar.

    摘要翻译: 用于在凸起的半导体晶片(118)的互连侧上模制模制化合物层的模具(105和110)包括:主空腔(117)和次级空腔(120),多个模制化合物从初级腔 )流。 辅助空腔(120)包括柱塞(130),其确定在模制期间等于模具化合物上期望的模具复合压力的预定背压。 由于主空腔(117)中的大多数多余的模制化合物被迫流入次级空腔(120),这有利地在半导体晶片(118)上留下相对薄的模制化合物层,然后可以将其去除, 例如通过在相对短的时间内研磨。 模具(105)还包括可移动的空腔棒(115),其可以在模制之后移动离开模具(105)并被冷却以分离粘附到空腔棒的模制基底。

    Method and apparatus for forming a flip chip semiconductor package and method for producing a substrate for the flip chip semiconductor package
    3.
    发明申请
    Method and apparatus for forming a flip chip semiconductor package and method for producing a substrate for the flip chip semiconductor package 审中-公开
    用于形成倒装芯片半导体封装的方法和装置以及用于制造用于倒装芯片半导体封装的衬底的方法

    公开(公告)号:US20050106784A1

    公开(公告)日:2005-05-19

    申请号:US10494423

    申请日:2002-10-15

    申请人: Dingwei Xia

    发明人: Dingwei Xia

    摘要: Specifications of a flip chip package and mold compound for a package are provided to a mold flow simulator and locations of void formation in the package during molding, identified. Subsequently, a substrate (124) for the package is designed with vias (206) at the locations of void formation. During molding, air pockets at the locations of void formation escape through the vias (206) and vents (116) in the lower cavity bar (110), as mold compound flows between the die and the substrate (124) and forces the air out. In addition, the lower cavity bar (110) has a down set central location (114), which allows air to pass from the vias (206) to the vents (116). In addition, as the diameter of a via (206) is between 20-30 microns, more area on the lower surface of the substrate (124) is available for terminals arranged in an array.

    摘要翻译: 用于封装的倒装芯片封装和模具化合物的规格被提供给模具流模拟器,并且在模制期间在封装中形成空隙的位置。 随后,用于封装的衬底(124)在空隙形成的位置处设有通孔(206)。 在模制期间,当模具化合物在模具和衬底(124)之间流动时,空隙形成位置处的气穴通过下腔体棒(110)中的通孔(206)和通气口(116)逸出并迫使空气流出 。 此外,下腔体杆110具有下降的中心位置(114),其允许空气从通孔(206)通过通气口(116)。 此外,由于通孔(206)的直径在20-30微米之间,所以基板(124)的下表面上的更多面积可用于排列成阵列的端子。