摘要:
An apparatus, method, and system for providing thermal management for an integrated circuit includes a first metallic layer directly placed on a back surface of the integrated circuit. An integrated heat spreader with a substantially cap-like shape is placed over the integrated circuit, with an aperture of a ceiling wall of the integrated heat spreader exposing a back surface of the integrated circuit at least in part. The first metallic layer is directly placed on top of an exterior surface of the ceiling wall of the integrated heat spreader as well as the back surface of the integrated circuit.
摘要:
An apparatus, method, and system for providing thermal management for an integrated circuit includes a first metallic layer directly placed on a back surface of the integrated circuit. An integrated heat spreader with a substantially cap-like shape is placed over the integrated circuit, with an aperture of a ceiling wall of the integrated heat spreader exposing a back surface of the integrated circuit at least in part. The first metallic layer is directly placed on top of an exterior surface of the ceiling wall of the integrated heat spreader as well as the back surface of the integrated circuit.
摘要:
An apparatus, method, and system for providing thermal management for an integrated circuit includes a first metallic layer directly placed on a back surface of the integrated circuit. An integrated heat spreader with a substantially cap-like shape is placed over the integrated circuit, with an aperture of a ceiling wall of the integrated heat spreader exposing a back surface of the integrated circuit at least in part. The first metallic layer is directly placed on top of an exterior surface of the ceiling wall of the integrated heat spreader as well as the back surface of the integrated circuit.
摘要:
In one embodiment, the present invention includes a semiconductor package having a substrate, a semiconductor die with a first surface opposing the substrate and a second surface, a metal layer formed on the second surface of the semiconductor die, and a mold layer formed on the substrate. In some embodiments, the mold layer is substantially coplanar with the metal layer to improve package performance. Other embodiments are described and claimed.