公开(公告)号：US08163626B2

公开(公告)日：2012-04-24

申请号：US12815659

申请日：2010-06-15

申请人： Johanes Swenburg ,  David Chu ,  Theresa Kramer Guarini ,  Yonah Cho ,  Udayan Ganguly ,  Lucien Date

发明人： Johanes Swenburg ,  David Chu ,  Theresa Kramer Guarini ,  Yonah Cho ,  Udayan Ganguly ,  Lucien Date

IPC分类号： H01L21/76

CPC分类号： H01L21/28273 ,  H01L29/66825 ,  H01L29/7881 ,  Y10S438/911

摘要： Embodiments described herein generally relate to flash memory devices and methods for manufacturing flash memory devices. In one embodiment, a method for selective removal of nitrogen from the nitrided areas of a substrate is provided. The method comprises positioning a substrate comprising a material layer disposed adjacent to an oxide containing layer in a processing chamber, exposing the substrate to a nitridation process to incorporate nitrogen onto the material layer and the exposed areas of the oxide containing layer, and exposing the nitrided material layer and the nitrided areas of the oxide containing layer to a gas mixture comprising a quantity of a hydrogen containing gas and a quantity of an oxygen containing gas to selectively remove nitrogen from the nitrided areas of the oxide containing layer relative to the nitrided material layer using a radical oxidation process.

摘要翻译： 本文描述的实施例通常涉及用于制造闪存设备的闪存设备和方法。 在一个实施例中，提供了用于从衬底的氮化区域中选择性地除去氮的方法。 该方法包括将包括邻近含氧化物层的材料层的衬底定位在处理室中，将衬底暴露于氮化工艺以将氮掺入材料层和含氧化物层的暴露区域上，并将氮化 材料层和含氧化物层的氮化区域包含一定量的含氢气体和一定量的含氧气体的气体混合物，以相对于氮化材料层从含氧化物层的氮化区域选择性地除去氮气 使用自由基氧化工艺。

公开(公告)号：US20100317186A1

公开(公告)日：2010-12-16

申请号：US12815659

申请日：2010-06-15

申请人： Johanes Swenberg ,  David Chu ,  Theresa Kramer Guarini ,  Yonah Cho ,  Udayan Ganguly ,  Lucien Date

发明人： Johanes Swenberg ,  David Chu ,  Theresa Kramer Guarini ,  Yonah Cho ,  Udayan Ganguly ,  Lucien Date

IPC分类号： H01L21/28 ,  H01L21/31

CPC分类号： H01L21/28273 ,  H01L29/66825 ,  H01L29/7881 ,  Y10S438/911

摘要： Embodiments described herein generally relate to flash memory devices and methods for manufacturing flash memory devices. In one embodiment, a method for selective removal of nitrogen from the nitrided areas of a substrate is provided. The method comprises positioning a substrate comprising a material layer disposed adjacent to an oxide containing layer in a processing chamber, exposing the substrate to a nitridation process to incorporate nitrogen onto the material layer and the exposed areas of the oxide containing layer, and exposing the nitrided material layer and the nitrided areas of the oxide containing layer to a gas mixture comprising a quantity of a hydrogen containing gas and a quantity of an oxygen containing gas to selectively remove nitrogen from the nitrided areas of the oxide containing layer relative to the nitrided material layer using a radical oxidation process.

摘要翻译： 本文描述的实施例通常涉及用于制造闪存设备的闪存设备和方法。 在一个实施例中，提供了用于从衬底的氮化区域中选择性地除去氮的方法。 该方法包括将包括邻近含氧化物层的材料层的衬底定位在处理室中，将衬底暴露于氮化工艺以将氮掺入材料层和含氧化物层的暴露区域上，并将氮化 材料层和含氧化物层的氮化区域包含一定量的含氢气体和一定量的含氧气体的气体混合物，以相对于氮化材料层从含氧化物层的氮化区域选择性地除去氮气 使用自由基氧化工艺。

公开(公告)号：US20110281429A1

公开(公告)日：2011-11-17

申请号：US13189225

申请日：2011-07-22

申请人： Udayan Ganguly ,  Christopher S. Olsen ,  Sean M. Seutter ,  Lucien Date

发明人： Udayan Ganguly ,  Christopher S. Olsen ,  Sean M. Seutter ,  Lucien Date

IPC分类号： H01L21/283

CPC分类号： H01L29/513 ,  H01L21/28282 ,  H01L29/518

摘要： A non-volatile memory semiconductor device comprising a semiconductor substrate having a channel and a gate stack above the channel. The gate stack comprises a tunnel layer adjacent to the channel, a charge trapping layer above the tunnel layer, a charge blocking layer above the charge trapping layer, a control gate above the charge blocking layer, and an intentionally incorporated interface region between the charge trapping layer and the charge blocking layer. The charge trapping layer comprises a compound including silicon and nitrogen, the charge blocking layer contains an oxide of a charge blocking component, and the interface region comprises a compound including silicon, nitrogen and the charge blocking component. The tunnel layer may comprise up to three tunnel sub-layers, the charge trapping layer may comprise two trapping sub-layers, and the charge blocking layer may comprise up to five blocking sub-layers. Various gate stack formation techniques can be employed.

公开(公告)号：US09502521B2

公开(公告)日：2016-11-22

申请号：US13189225

申请日：2011-07-22

申请人： Udayan Ganguly ,  Christopher S. Olsen ,  Sean M. Seutter ,  Lucien Date

发明人： Udayan Ganguly ,  Christopher S. Olsen ,  Sean M. Seutter ,  Lucien Date

IPC分类号： H01L21/28 ,  H01L29/51

CPC分类号： H01L29/513 ,  H01L21/28282 ,  H01L29/518

摘要： A non-volatile memory semiconductor device comprising a semiconductor substrate having a channel and a gate stack above the channel. The gate stack comprises a tunnel layer adjacent to the channel, a charge trapping layer above the tunnel layer, a charge blocking layer above the charge trapping layer, a control gate above the charge blocking layer, and an intentionally incorporated interface region between the charge trapping layer and the charge blocking layer. The charge trapping layer comprises a compound including silicon and nitrogen, the charge blocking layer contains an oxide of a charge blocking component, and the interface region comprises a compound including silicon, nitrogen and the charge blocking component. The tunnel layer may comprise up to three tunnel sub-layers, the charge trapping layer may comprise two trapping sub-layers, and the charge blocking layer may comprise up to five blocking sub-layers. Various gate stack formation techniques can be employed.

摘要翻译： 一种非易失性存储器半导体器件，包括在沟道上方具有沟道和栅极堆叠的半导体衬底。 栅极堆叠包括与沟道相邻的隧道层，隧道层上方的电荷俘获层，电荷俘获层上方的电荷阻挡层，电荷阻挡层上方的控制栅极以及电荷俘获之间有意并入的界面区域 层和电荷阻挡层。 电荷捕获层包括包含硅和氮的化合物，电荷阻挡层含有电荷阻挡组分的氧化物，并且界面区域包括包含硅，氮和电荷阻挡组分的化合物。 隧道层可以包括多达三个隧道子层，电荷捕获层可以包括两个陷阱子层，并且电荷阻挡层可以包括多达五个阻塞子层。 可以采用各种栅堆叠形成技术。

公开(公告)号：US20110101442A1

公开(公告)日：2011-05-05

申请号：US12610457

申请日：2009-11-02

申请人： Udayan Ganguly ,  Christopher S. Olsen ,  Sean M. Seutter ,  Lucien Date

发明人： Udayan Ganguly ,  Christopher S. Olsen ,  Sean M. Seutter ,  Lucien Date

IPC分类号： H01L29/792 ,  H01L21/28

CPC分类号： H01L29/513 ,  H01L29/40117 ,  H01L29/518

摘要： A non-volatile memory semiconductor device comprising a semiconductor substrate having a channel and a gate stack above the channel. The gate stack comprises a tunnel layer adjacent to the channel, a charge trapping layer above the tunnel layer, a charge blocking layer above the charge trapping layer, a control gate above the charge blocking layer, and an intentionally incorporated interface region between the charge trapping layer and the charge blocking layer. The charge trapping layer comprises a compound including silicon and nitrogen, the charge blocking layer contains an oxide of a charge blocking component, and the interface region comprises a compound including silicon, nitrogen and the charge blocking component. The tunnel layer may comprise up to three tunnel sub-layers, the charge trapping layer may comprise two trapping sub-layers, and the charge blocking layer may comprise up to five blocking sub-layers. Various gate stack formation techniques can be employed.

摘要翻译： 一种非易失性存储器半导体器件，包括在沟道上方具有沟道和栅极堆叠的半导体衬底。 栅极堆叠包括与沟道相邻的隧道层，隧道层上方的电荷俘获层，电荷俘获层上方的电荷阻挡层，电荷阻挡层上方的控制栅极以及电荷俘获之间有意并入的界面区域 层和电荷阻挡层。 电荷捕获层包括包含硅和氮的化合物，电荷阻挡层含有电荷阻挡组分的氧化物，并且界面区域包括包含硅，氮和电荷阻挡组分的化合物。 隧道层可以包括多达三个隧道子层，电荷捕获层可以包括两个陷阱子层，并且电荷阻挡层可以包括多达五个阻塞子层。 可以采用各种栅堆叠形成技术。

公开(公告)号：US08163343B2

公开(公告)日：2012-04-24

申请号：US12203647

申请日：2008-09-03

申请人： Shreyas S. Kher ,  Christopher S. Olsen ,  Lucien Date

发明人： Shreyas S. Kher ,  Christopher S. Olsen ,  Lucien Date

IPC分类号： C23C16/40

CPC分类号： C23C16/403 ,  C23C16/0272 ,  H01L21/02178 ,  H01L21/02271 ,  H01L21/31616

摘要： Methods of forming aluminum oxide layers on substrates are disclosed. In some embodiments, the method includes depositing an aluminum oxide seed layer on the substrate using a first process having a first deposition rate. The method further includes depositing a bulk aluminum oxide layer atop the seed layer using a metalorganic chemical vapor deposition (MOCVD) process having a second deposition rate greater than the first deposition rate.

摘要翻译： 公开了在基底上形成氧化铝层的方法。 在一些实施例中，该方法包括使用具有第一沉积速率的第一工艺在衬底上沉积氧化铝种子层。 该方法还包括使用具有大于第一沉积速率的第二沉积速率的金属有机化学气相沉积（MOCVD）工艺沉积种子层顶部的体积氧化铝层。

公开(公告)号：US08507389B2

公开(公告)日：2013-08-13

申请号：US12835866

申请日：2010-07-14

申请人： Lucien Date ,  Paul William Turnbull

发明人： Lucien Date ,  Paul William Turnbull

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： C23C16/303 ,  C23C16/308 ,  C23C16/401 ,  C23C16/45531 ,  H01L21/02148 ,  H01L21/022 ,  H01L21/0228

摘要： Methods for forming a dielectric layer on a substrate are provided herein. In some embodiments a method for forming a dielectric layer on a substrate may include exposing the substrate to a first source gas comprising a silicon precursor and an oxidizer for a first period of time to form a first layer comprising silicon and oxygen; and exposing the substrate to a second source gas comprising a metal precursor and the silicon precursor for a second period of time to form a second layer comprising silicon and a metal, where in the first layer and the second layer form the dielectric layer.

摘要翻译： 本文提供了在基板上形成电介质层的方法。 在一些实施例中，用于在衬底上形成电介质层的方法可以包括将衬底暴露于包含硅前体和氧化剂的第一源气体，持续第一时间段以形成包含硅和氧的第一层; 以及将所述衬底暴露于包含金属前体和所述硅前体的第二源气体持续第二时间段，以形成包含硅和金属的第二层，其中在所述第一层和所述第二层中形成所述介电层。

公开(公告)号：US20110039419A1

公开(公告)日：2011-02-17

申请号：US12835866

申请日：2010-07-14

申请人： Lucien Date ,  Paul William Turnbull

发明人： Lucien Date ,  Paul William Turnbull

IPC分类号： H01L21/31

CPC分类号： C23C16/303 ,  C23C16/308 ,  C23C16/401 ,  C23C16/45531 ,  H01L21/02148 ,  H01L21/022 ,  H01L21/0228

摘要： Methods for forming a dielectric layer on a substrate are provided herein. In some embodiments a method for forming a dielectric layer on a substrate may include exposing the substrate to a first source gas comprising a silicon (Si) precursor and an oxidizer for a first period of time to form a first layer comprising silicon and oxygen; and exposing the substrate to a second source gas comprising a metal precursor and the silicon precursor for a second period of time to form a second layer comprising silicon and a metal, where in the first layer and the second layer form the dielectric layer.

摘要翻译： 本文提供了在基板上形成电介质层的方法。 在一些实施例中，用于在衬底上形成电介质层的方法可以包括将衬底暴露于包含硅（Si）前体和氧化剂的第一源气体第一时间段以形成包含硅和氧的第一层; 以及将所述衬底暴露于包含金属前体和所述硅前体的第二源气体持续第二时间段，以形成包含硅和金属的第二层，其中在所述第一层和所述第二层中形成所述介电层。