-
公开(公告)号：US20090261890A1
公开(公告)日：2009-10-22
申请号：US12104132
申请日：2008-04-16
IPC分类号： G05F1/10
CPC分类号： H02M3/07 , H02M2001/0045
摘要： An apparatus and method for a regulated voltage boost charge pump for an integrated circuit (IC) device. The charge pump generally includes a plurality of switching networks and a lift capacitor that are intermittently coupled to an output capacitor or to a regulating transistor, a differential error amplifier biasing a gate terminal of the transistor, and a controller configured to alternate states of switches in the switching networks in a pre-selected timing relationship with a clock signal of the IC device.
摘要翻译： 一种用于集成电路（IC）装置的稳压升压电荷泵的装置和方法。 电荷泵通常包括间歇地耦合到输出电容器或调节晶体管的多个开关网络和升压电容器，偏置晶体管的栅极端子的差分误差放大器以及配置成交替转换开关状态的控制器 所述交换网络与所述IC设备的时钟信号处于预先选择的定时关系。
-
2.发明授权公开(公告)号：US08401135B2
公开(公告)日：2013-03-19
申请号：US12698629
申请日：2010-02-02
IPC分类号： H04B1/10
CPC分类号： H04L27/01
摘要： A serial data receiver includes an amplitude path including a first signal conditioner that adds a first offset or subtracts a second offset based on a selection input, a preamp configured to receive a signal from a transmitter and provide an input signal to the amplitude path, an amplitude latch coupled to the amplitude path, a data latch having a data output and a decision feedback equalization (DFE) logic block coupled to the first conditioning element and the data output and configured to generate the selection output based on the data output of the data latch.
摘要翻译： 串行数据接收器包括幅度路径，该幅度路径包括基于选择输入添加第一偏移或减去第二偏移的第一信号调节器，被配置为从发送器接收信号并且向幅度路径提供输入信号的前置放大器， 耦合到振幅路径的振幅锁存器，具有数据输出的数据锁存器和耦合到第一调理元件和数据输出的判定反馈均衡（DFE）逻辑块，并且被配置为基于数据的数据输出生成选择输出 锁定。
-
公开(公告)号：US08183949B2
公开(公告)日：2012-05-22
申请号：US12365919
申请日：2009-02-05
IPC分类号： H04B1/06
CPC分类号： H03L7/113
摘要： A method is provided for selecting an operating band of a voltage-controlled oscillator (“VCO”) of a phase locked loop (“PLL”) for which the lock frequency is closest to a center of the frequency range of the operating band. In such method, steps can be performed to determine the maximum and minimum frequencies of the operating band and the center frequency between them. From the center frequency of the operating band and the lock frequency within such operating band, a difference value can then be determined. The operating bands of the PLL can be tested until an operating band having the smallest difference value is determined. The VCO can then be set to such operating band in order for the lock frequency to be closest to the center frequency of the operating band.
摘要翻译： 提供了一种用于选择锁定频率最接近工作频带的频率范围的中心的锁相环（“PLL”）的压控振荡器（“VCO”）的工作频带的方法。 在这种方法中，可以执行步骤来确定工作频带的最大和最小频率以及它们之间的中心频率。 根据工作频带的中心频率和该频带内的锁定频率，可以确定差分值。 可以测试PLL的工作频带，直到确定具有最小差值的工作频带。 然后可以将VCO设置到这样的工作频带，以使锁定频率最接近工作频带的中心频率。
-
公开(公告)号：US20100194482A1
公开(公告)日：2010-08-05
申请号：US12365919
申请日：2009-02-05
IPC分类号： H03L7/00
CPC分类号： H03L7/113
摘要： A method is provided for selecting an operating band of a voltage-controlled oscillator (“VCO”) of a phase locked loop (“PLL”) for which the lock frequency is closest to a center of the frequency range of the operating band. In such method, steps can be performed to determine the maximum and minimum frequencies of the operating band and the center frequency between them. From the center frequency of the operating band and the lock frequency within such operating band, a difference value can then be determined. The operating bands of the PLL can be tested until an operating band having the smallest difference value is determined. The VCO can then be set to such operating band in order for the lock frequency to be closest to the center frequency of the operating band.
摘要翻译： 提供了一种用于选择锁定频率最接近工作频带的频率范围的中心的锁相环（“PLL”）的压控振荡器（“VCO”）的工作频带的方法。 在这种方法中，可以执行步骤来确定工作频带的最大和最小频率以及它们之间的中心频率。 根据工作频带的中心频率和该频带内的锁定频率，可以确定差分值。 可以测试PLL的工作频带，直到确定具有最小差值的工作频带。 然后可以将VCO设置到这样的工作频带，以使锁定频率最接近工作频带的中心频率。
-
5.发明授权Data transceiver and method for equalizing the data eye of a differential input data signal 有权用于均衡差分输入数据信号的数据眼的数据收发器和方法公开(公告)号：US07352815B2
公开(公告)日：2008-04-01
申请号：US10604025
申请日：2003-06-23
申请人： Hibourahima Camara , Joseph Natonio , Karl D. Selander , Michael A. Sorna , Jeremy K. Stephens , Daniel W. Storaska
发明人： Hibourahima Camara , Joseph Natonio , Karl D. Selander , Michael A. Sorna , Jeremy K. Stephens , Daniel W. Storaska
IPC分类号： H04B3/00
CPC分类号： H04L25/03885
摘要： Apparatus and method for counteracting high frequency attenuation of a differential input data signal as the signal is conducted through a data link. A differential input data signal is transmitted from a transmitter to a receiver through a data link. The data eye of the differential input data signal is modified at the transmitter in response to feedback from the receiver where the extent of the data eye of the differential input data signal, after being conducted through the data link, is determined. The feedback to the transmitter, dependent on the determination of the extent of the data eye, controls the data eye at the transmitter and the equalization of the differential input data signal by adapting the differential input data signal to anticipate high frequency attenuation of the differential input data signal in the data link.
摘要翻译： 当通过数据链路传送信号时，抵消差分输入数据信号的高频衰减的装置和方法。 差分输入数据信号通过数据链路从发送器发送到接收器。 差分输入数据信号的数据眼睛响应于来自接收机的反馈在发射机处被修改，其中差分输入数据信号在通过数据链路传导之后的数据眼的程度被确定。 取决于数据眼的范围的确定，对发射机的反馈通过调整差分输入数据信号来预测差分输入的高频衰减来控制发射机上的数据眼和差分输入数据信号的均衡 数据链路中的数据信号。
-
6.发明授权公开(公告)号：US08040813B2
公开(公告)日：2011-10-18
申请号：US10908959
申请日：2005-06-02
IPC分类号： G01R31/08 , G06F11/00 , G08C15/00 , H04J1/16 , H04J3/14 , H04L1/00 , H04L12/26 , H03K17/16 , G05F1/00 , H03K5/01 , H03K9/00 , H03K5/00 , H03K19/0175 , G01N30/86
CPC分类号： G06F13/4072
摘要： An apparatus is provided which includes a common signal node operable to conduct a first signal, a first circuit coupled to the common signal node to utilize the first signal and a signal-handling element coupled to the common signal node. The signal-handling element includes an isolating circuit coupled to the first conductor, a second conductor operable to conduct an output of the isolating circuit, and a signal-handling circuit coupled to the second conductor. The signal-handling circuit is operable to perform a signal-handling function in response to the output of the isolating circuit. By virtue of the isolating circuit, the signal-handling circuit and the first circuit are isolated from the second conductor and the signal-handling circuit. Preferably, the achieved isolation permits a communication signal included in the first signal to be conducted within a communication apparatus with less capacitance, and producing less return loss of that signal.
摘要翻译： 提供一种装置，其包括可操作以传导第一信号的公共信号节点，耦合到公共信号节点以利用第一信号的第一电路和耦合到公共信号节点的信号处理元件。 信号处理元件包括耦合到第一导体的隔离电路，可操作以导通隔离电路的输出的第二导体和耦合到第二导体的信号处理电路。 信号处理电路可操作以响应于隔离电路的输出执行信号处理功能。 通过隔离电路，信号处理电路和第一电路与第二导体和信号处理电路隔离。 优选地，所实现的隔离允许包含在第一信号中的通信信号在具有较小电容的通信设备内传导，并且产生较小的该信号的回波损耗。
-
7.发明授权公开(公告)号：US08024679B2
公开(公告)日：2011-09-20
申请号：US11999627
申请日：2007-12-06
IPC分类号： G06F17/50
CPC分类号： H03K19/0185 , H04L25/0266
摘要： A design structure for a signal-handing apparatus or communication apparatus is provided which includes a common signal node operable to conduct a first signal, a first circuit coupled to the common signal node to utilize the first signal and a signal-handling element coupled to the common signal node. A signal-handling apparatus may include an isolating circuit coupled to a first conductor, a second conductor to conduct an output of the isolating circuit, and a signal-handling circuit coupled to the second conductor. A signal-handling circuit can perform a signal-handling function in response to the output of the isolating circuit. The signal-handling circuit and the first circuit may be isolated from the second conductor and the signal-handling circuit such that a communication signal may be conducted with less capacitance and be subject to less return loss.
摘要翻译： 提供了一种用于信号处理装置或通信装置的设计结构，其包括可操作以传导第一信号的公共信号节点，耦合到公共信号节点以利用第一信号的第一电路和耦合到第一信号的信号处理元件 公共信号节点。 信号处理装置可以包括耦合到第一导体的隔离电路，用于导通隔离电路的输出的第二导体以及耦合到第二导体的信号处理电路。 信号处理电路可以响应于隔离电路的输出而执行信号处理功能。 信号处理电路和第一电路可以与第二导体和信号处理电路隔离，使得通信信号可以以较小的电容进行并且具有较小的回波损耗。
-
8.发明申请公开(公告)号：US20090146692A1
公开(公告)日：2009-06-11
申请号：US11999627
申请日：2007-12-06
IPC分类号： H03K19/0175
CPC分类号： H03K19/0185 , H04L25/0266
摘要： A design structure for a signal-handing apparatus or communication apparatus is provided which includes a common signal node operable to conduct a first signal, a first circuit coupled to the common signal node to utilize the first signal and a signal-handling element coupled to the common signal node. A signal-handling apparatus may include an isolating circuit coupled to a first conductor, a second conductor to conduct an output of the isolating circuit, and a signal-handling circuit coupled to the second conductor. A signal-handling circuit can perform a signal-handling function in response to the output of the isolating circuit. The signal-handling circuit and the first circuit may be isolated from the second conductor and the signal-handling circuit such that a communication signal may be conducted with less capacitance and be subject to less return loss.
摘要翻译： 提供了一种用于信号处理装置或通信装置的设计结构，其包括可操作以传导第一信号的公共信号节点，耦合到公共信号节点以利用第一信号的第一电路和耦合到第一信号的信号处理元件 公共信号节点。 信号处理装置可以包括耦合到第一导体的隔离电路，用于导通隔离电路的输出的第二导体以及耦合到第二导体的信号处理电路。 信号处理电路可以响应于隔离电路的输出而执行信号处理功能。 信号处理电路和第一电路可以与第二导体和信号处理电路隔离，使得通信信号可以以较小的电容进行并且具有较小的回波损耗。
-
公开(公告)号：US08183950B2
公开(公告)日：2012-05-22
申请号：US12365921
申请日：2009-02-05
IPC分类号： H04B1/06
CPC分类号： H03L7/10 , H03L7/0995 , H03L7/12 , H03L7/187 , H03L2207/06
摘要： A phase locked loop (“PLL”) includes a voltage controlled oscillator (“VCO”) operable to acquire and maintain lock at a selected output frequency of the VCO and control logic operable to perform steps in a method of selecting a frequency band for operating the VCO. Such method can include switching the VCO to a given operating band from among the plurality of operating bands of the VCO; determining a band center frequency at which the VCO oscillates in the given operating band when the control voltage is set to a center of a range of minimum to maximum control voltages [CVmin, CVmax]; determining a difference between the band center frequency and the selected output frequency when the selected output frequency is within the given operating band; switching the VCO to another operating band; repeating the above steps until a difference between the band center frequency and the selected output frequency increases; and selecting the operating band for operation of the VCO for which the difference between the band center frequency and the selected output frequency is smallest.
摘要翻译： 锁相环（“PLL”）包括压控振荡器（“VCO”），其可操作以获取并维持VCO的所选输出频率处的锁定和可操作以执行选择用于操作的频带的方法中的步骤的步骤 VCO。 这种方法可以包括将VCO切换到来自VCO的多个工作频带中的给定工作频带; 当控制电压被设置为最小到最大控制电压[CVmin，CVmax]的范围的中心时，确定VCO在给定工作频带中振荡的频带中心频率; 当所选择的输出频率在所述给定的工作频带内时，确定所述频带中心频率与所选择的输出频率之间的差; 将VCO切换到另一个工作频带; 重复上述步骤，直到频带中心频率和所选择的输出频率之间的差异增加; 以及选择用于频带中心频率和所选输出频率之间的差最小的VCO的工作频带。
-
10.发明申请公开(公告)号：US20110188566A1
公开(公告)日：2011-08-04
申请号：US12698629
申请日：2010-02-02
IPC分类号： H04L27/01
CPC分类号： H04L27/01
摘要： A serial data receiver includes an amplitude path including a first signal conditioner that adds a first offset or subtracts a second offset based on a selection input, a preamp configured to receive a signal from a transmitter and provide an input signal to the amplitude path, an amplitude latch coupled to the amplitude path, a data latch having a data output and a decision feedback equalization (DFE) logic block coupled to the first conditioning element and the data output and configured to generate the selection output based on the data output of the data latch.
摘要翻译： 串行数据接收器包括幅度路径，该幅度路径包括基于选择输入添加第一偏移或减去第二偏移的第一信号调节器，被配置为从发送器接收信号并且向幅度路径提供输入信号的前置放大器， 耦合到振幅路径的振幅锁存器，具有数据输出的数据锁存器和耦合到第一调理元件和数据输出的判定反馈均衡（DFE）逻辑块，并且被配置为基于数据的数据输出生成选择输出 锁定。
-
-
-
-
-
-
-
-
-
搜索结果
22 条记录 (耗时 0.024 秒)