摘要:
The functions of two virtual operating systems (e.g., S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors access the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.
摘要翻译:两个虚拟操作系统(例如,S / 370VM,VSE或IX370和S / 88OS)的功能被合并到一个物理系统中。 S / 88处理器的合作伙伴对运行S / 88操作系统,并处理系统的容错和单系统映像方面。 S / 370处理器的一个或多个伙伴对直接和通过S / 88总线耦合到对应的S / 88处理器。 每个S / 370处理器从S / 88主存储器分配从1到16兆字节的连续存储。 每个S / 370虚拟操作系统认为其存储器分配从地址0开始,并且通过正常的S / 370动态存储器分配和寻呼技术管理其存储器。 S / 370被限制检查以防止S / 370访问S / 88存储器空间。 S / 88操作系统是所有系统硬件和I / O设备的主控。 S / 88处理器直接响应S / 88应用程序来访问S / 370地址空间,以便S / 88可以将I / O数据移动到S / 370 I / O缓冲器中并处理S / 370 I / O操作。 S / 88和S / 370对等体处理器对在单个系统环境中执行其各自的操作系统,而不会显着地重写任一操作系统。 操作系统都不知道其他操作系统和其他处理器对。
摘要:
An information handling apparatus for transferring and composing image signals for display including a bus interface circuit adapted to allow selective access to a bus of an independent image signal generated by an independent image source. The selective access enables composition of the independent image signal in response to control information; the composition enables real time display of a composed image signal.
摘要:
A cycle steal mechanism for enabling a host processor to initiate and control the cycle stealing of data to or from a storage unit located in an I/O controller which is connected to the I/O channel bus of the host processor. The I/O controller also includes a microprocessor and a direct memory access (DMA) unit either or both of which can be used to control the transfer of data between the I/O controller storage unit and the host processor. Typically, the DMA unit is used for cycle stealing data between the controller storage unit and the host processor. The cycle steal mechanism of the present invention enables the host processor to also initiate and control the cycle stealing of data to or from the controller storage unit without interrupting the program running in the controller microprocessor and without interrupting the cycle stealing operations of the DMA unit. This new cycle steal mechanism is the reverse of the normal situation where it is the microprocessor or DMA unit that is controlling the cycle stealing. Since the I/O controller accommodates both kinds of cycle stealing, the present invention can be said to provide a "2-way" cycle stealing capability. Not only can the I/O controller cycle steal data to or from the host processor main storage unit, but also the host processor can cycle steal data to or from the I/O controller storage unit. The cycle stealing by the host processor is transparent to both the microprocessor and the DMA unit in the I/O controller. This new cycle steal mechanism makes use of the microprocessor address set-up pulse (ALE) and the DMA unit address set-up pulse (ADSTB) to cause the cycle stealing of the data to or from the controller storage unit to occur during such address set-up time. These address set-up times are times when neither the microprocessor nor the DMA unit is actually moving data into or out of the storage unit in the I/O controller.
摘要:
The functions of two virtual operating systems (e. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors access the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.
摘要翻译:两个虚拟操作系统(例如S / 370 VM,VSE或IX370和S / 88 OS)的功能被合并到一个物理系统中。 S / 88处理器的合作伙伴对运行S / 88操作系统,并处理系统的容错和单系统映像方面。 S / 370处理器的一个或多个伙伴对直接和通过S / 88总线耦合到对应的S / 88处理器。 每个S / 370处理器从S / 88主存储器分配从1到16兆字节的连续存储。 每个S / 370虚拟操作系统认为其存储器分配从地址0开始,并且通过正常的S / 370动态存储器分配和寻呼技术管理其存储器。 S / 370被限制检查以防止S / 370访问S / 88存储器空间。 S / 88操作系统是所有系统硬件和I / O设备的主控。 S / 88处理器直接响应S / 88应用程序来访问S / 370地址空间,以便S / 88可以将I / O数据移动到S / 370 I / O缓冲器中并处理S / 370 I / O操作。 S / 88和S / 370对等体处理器对在单个系统环境中执行其各自的操作系统,而不会显着地重写任一操作系统。 操作系统都不知道其他操作系统和其他处理器对。
摘要:
The functions of two virtual operating systems (e.g., S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contigous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors access the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.
摘要:
An information handling apparatus for transferring and composing image signals including a plurality of media sources configured to provide a corresponding plurality of image signals, a media bus connected to the media sources, and a media control module coupled to the media bus. The media bus allows selective access for the plurality of image signals. The selective access enables composition of the independent image signals in response to control information. The media control module receives a composed image signal from the media bus and provides the composed image signal to a display device.
摘要:
The functions of two virtual operating systems (e.g., S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors access the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.
摘要:
A data interface mechanism for interfacing bit-parallel data buses of different bit widths. This mechanism provides an automatic and efficient mechanism for converting data bytes into plural-byte data words and vice versa. The mechanism utilizes a plurality of random access (RAM) storage units located between the two data buses and an addressing structure wherein the higher order address bits are supplied to a chip select decoder to produce different chip select signals which are used to select different ones of the RAM units. For successive data transfers to or from the narrower data bus, storage addresses are used which produce different chip select signals which select the different RAM units one after the other in a sequence which repeats itself. Thus, successive data bytes to (from) the narrower bus are transferred from (to) the different RAM units in a rotating manner. For data transfers to or from the wider data bus, a storage address is used which produces a distinctive chip select signal which is different from those used for the individual narrower transfers. This distinctive chip select signal causes the storage control logic to simultaneously select all of the RAM units. This enables a simultaneous parallel transfer of data from all of the RAM units to the wider data bus or vice versa.
摘要:
The functions of two virtual operating systems (e.g., S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques, The S/370 is limit checked prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors access the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.
摘要:
The functions of two virtual operating systems (e.g., S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors access the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.
摘要翻译:两个虚拟操作系统(例如,S / 370VM,VSE或IX370和S / 88OS)的功能被合并到一个物理系统中。 S / 88处理器的合作伙伴对运行S / 88操作系统,并处理系统的容错和单系统映像方面。 S / 370处理器的一个或多个伙伴对直接和通过S / 88总线耦合到对应的S / 88处理器。 每个S / 370处理器从S / 88主存储器分配从1到16兆字节的连续存储。 每个S / 370虚拟操作系统认为其存储器分配从地址0开始,并且通过正常的S / 370动态存储器分配和寻呼技术管理其存储器。 S / 370被限制检查以防止S / 370访问S / 88存储器空间。 S / 88操作系统是所有系统硬件和I / O设备的主控。 S / 88处理器直接响应S / 88应用程序来访问S / 370地址空间,以便S / 88可以将I / O数据移动到S / 370 I / O缓冲器中并处理S / 370 I / O操作。 S / 88和S / 370对等体处理器对在单个系统环境中执行其各自的操作系统,而不会显着地重写任一操作系统。 操作系统都不知道其他操作系统和其他处理器对。