Servicing interrupt requests in a data processing system without using
the services of an operating system
    1.
    发明授权
    Servicing interrupt requests in a data processing system without using the services of an operating system 失效
    在数据处理系统中维护中断请求,而不使用操作系统的服务

    公开(公告)号:US5369767A

    公开(公告)日:1994-11-29

    申请号:US353117

    申请日:1989-05-17

    摘要: The functions of two virtual operating systems (e.g., S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors access the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.

    摘要翻译: 两个虚拟操作系统(例如,S / 370VM,VSE或IX370和S / 88OS)的功能被合并到一个物理系统中。 S / 88处理器的合作伙伴对运行S / 88操作系统,并处理系统的容错和单系统映像方面。 S / 370处理器的一个或多个伙伴对直接和通过S / 88总线耦合到对应的S / 88处理器。 每个S / 370处理器从S / 88主存储器分配从1到16兆字节的连续存储。 每个S / 370虚拟操作系统认为其存储器分配从地址0开始,并且通过正常的S / 370动态存储器分配和寻呼技术管理其存储器。 S / 370被限制检查以防止S / 370访问S / 88存储器空间。 S / 88操作系统是所有系统硬件和I / O设备的主控。 S / 88处理器直接响应S / 88应用程序来访问S / 370地址空间,以便S / 88可以将I / O数据移动到S / 370 I / O缓冲器中并处理S / 370 I / O操作。 S / 88和S / 370对等体处理器对在单个系统环境中执行其各自的操作系统,而不会显着地重写任一操作系统。 操作系统都不知道其他操作系统和其他处理器对。

    Synchronous cycle steal mechanism for transferring data between a
processor storage unit and a separate data handling unit

    公开(公告)号:US4417304A

    公开(公告)日:1983-11-22

    申请号:US321132

    申请日:1981-11-13

    IPC分类号: G06F13/28 G06F3/00

    CPC分类号: G06F13/28

    摘要: A cycle steal mechanism for enabling a host processor to initiate and control the cycle stealing of data to or from a storage unit located in an I/O controller which is connected to the I/O channel bus of the host processor. The I/O controller also includes a microprocessor and a direct memory access (DMA) unit either or both of which can be used to control the transfer of data between the I/O controller storage unit and the host processor. Typically, the DMA unit is used for cycle stealing data between the controller storage unit and the host processor. The cycle steal mechanism of the present invention enables the host processor to also initiate and control the cycle stealing of data to or from the controller storage unit without interrupting the program running in the controller microprocessor and without interrupting the cycle stealing operations of the DMA unit. This new cycle steal mechanism is the reverse of the normal situation where it is the microprocessor or DMA unit that is controlling the cycle stealing. Since the I/O controller accommodates both kinds of cycle stealing, the present invention can be said to provide a "2-way" cycle stealing capability. Not only can the I/O controller cycle steal data to or from the host processor main storage unit, but also the host processor can cycle steal data to or from the I/O controller storage unit. The cycle stealing by the host processor is transparent to both the microprocessor and the DMA unit in the I/O controller. This new cycle steal mechanism makes use of the microprocessor address set-up pulse (ALE) and the DMA unit address set-up pulse (ADSTB) to cause the cycle stealing of the data to or from the controller storage unit to occur during such address set-up time. These address set-up times are times when neither the microprocessor nor the DMA unit is actually moving data into or out of the storage unit in the I/O controller.

    Uncoupling a central processing unit from its associated hardware for
interaction with data handling apparatus alien to the operating system
controlling said unit and hardware
    4.
    发明授权
    Uncoupling a central processing unit from its associated hardware for interaction with data handling apparatus alien to the operating system controlling said unit and hardware 失效
    从其相关联的硬件解耦中央处理单元,用于与控制所述单元和硬件的操作系统不相关的数据处理装置进行交互

    公开(公告)号:US5388215A

    公开(公告)日:1995-02-07

    申请号:US234706

    申请日:1994-04-28

    摘要: The functions of two virtual operating systems (e. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors access the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.

    摘要翻译: 两个虚拟操作系统(例如S / 370 VM,VSE或IX370和S / 88 OS)的功能被合并到一个物理系统中。 S / 88处理器的合作伙伴对运行S / 88操作系统,并处理系统的容错和单系统映像方面。 S / 370处理器的一个或多个伙伴对直接和通过S / 88总线耦合到对应的S / 88处理器。 每个S / 370处理器从S / 88主存储器分配从1到16兆字节的连续存储。 每个S / 370虚拟操作系统认为其存储器分配从地址0开始,并且通过正常的S / 370动态存储器分配和寻呼技术管理其存储器。 S / 370被限制检查以防止S / 370访问S / 88存储器空间。 S / 88操作系统是所有系统硬件和I / O设备的主控。 S / 88处理器直接响应S / 88应用程序来访问S / 370地址空间,以便S / 88可以将I / O数据移动到S / 370 I / O缓冲器中并处理S / 370 I / O操作。 S / 88和S / 370对等体处理器对在单个系统环境中执行其各自的操作系统,而不会显着地重写任一操作系统。 操作系统都不知道其他操作系统和其他处理器对。

    Multimedia system
    6.
    发明授权
    Multimedia system 失效
    多媒体系统

    公开(公告)号:US5434590A

    公开(公告)日:1995-07-18

    申请号:US136724

    申请日:1993-10-14

    摘要: An information handling apparatus for transferring and composing image signals including a plurality of media sources configured to provide a corresponding plurality of image signals, a media bus connected to the media sources, and a media control module coupled to the media bus. The media bus allows selective access for the plurality of image signals. The selective access enables composition of the independent image signals in response to control information. The media control module receives a composed image signal from the media bus and provides the composed image signal to a display device.

    摘要翻译: 一种用于传送和组合图像信号的信息处理装置,包括被配置为提供对应的多个图像信号的多个媒体源,连接到媒体源的媒体总线以及耦合到媒体总线的媒体控制模块。 媒体总线允许选择性地访问多个图像信号。 选择性访问可以响应于控制信息构成独立图像信号。 媒体控制模块从媒体总线接收合成的图像信号,并将合成的图像信号提供给显示装置。

    Data interface mechanism for interfacing bit-parallel data buses of
different bit width
    8.
    发明授权
    Data interface mechanism for interfacing bit-parallel data buses of different bit width 失效
    用于接口不同位宽的位并行数据总线的数据接口机制

    公开(公告)号:US4309754A

    公开(公告)日:1982-01-05

    申请号:US62261

    申请日:1979-07-30

    CPC分类号: G06F13/4018

    摘要: A data interface mechanism for interfacing bit-parallel data buses of different bit widths. This mechanism provides an automatic and efficient mechanism for converting data bytes into plural-byte data words and vice versa. The mechanism utilizes a plurality of random access (RAM) storage units located between the two data buses and an addressing structure wherein the higher order address bits are supplied to a chip select decoder to produce different chip select signals which are used to select different ones of the RAM units. For successive data transfers to or from the narrower data bus, storage addresses are used which produce different chip select signals which select the different RAM units one after the other in a sequence which repeats itself. Thus, successive data bytes to (from) the narrower bus are transferred from (to) the different RAM units in a rotating manner. For data transfers to or from the wider data bus, a storage address is used which produces a distinctive chip select signal which is different from those used for the individual narrower transfers. This distinctive chip select signal causes the storage control logic to simultaneously select all of the RAM units. This enables a simultaneous parallel transfer of data from all of the RAM units to the wider data bus or vice versa.

    摘要翻译: 用于连接不同位宽的位并行数据总线的数据接口机制。 该机制提供了一种自动而有效的机制,用于将数据字节转换为多字节数据字,反之亦然。 该机制利用位于两个数据总线之间的多个随机存取(RAM)存储单元和寻址结构,其中较高阶地址位被提供给片选器解码器以产生用于选择不同的片选信号的不同片选信号 RAM单元。 对于连续数据传送到或从较窄数据总线传输,使用产生不同芯片选择信号的存储地址,该芯片选择信号以重复自身的顺序依次选择不同的RAM单元。 因此,到(从)较窄总线的连续数据字节以(旋转)方式从(到)不同的RAM单元传送。 对于从更宽的数据总线传输数据或从更宽的数据总线传输数据,使用存储地址,产生与用于单个较窄传输的信号不同的独特芯片选择信号。 这种独特的芯片选择信号使存储控制逻辑同时选择所有的RAM单元。 这使得可以将数据从所有RAM单元同时并行传输到更宽的数据总线,反之亦然。

    System for removing section of memory from first system and allocating
to second system in a manner indiscernable to both operating systems
    9.
    发明授权
    System for removing section of memory from first system and allocating to second system in a manner indiscernable to both operating systems 失效
    用于从第一系统中去除存储器部分并以对两个操作系统不可理解的方式分配给第二系统的系统

    公开(公告)号:US5363497A

    公开(公告)日:1994-11-08

    申请号:US128760

    申请日:1993-09-30

    摘要: The functions of two virtual operating systems (e.g., S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques, The S/370 is limit checked prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors access the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.

    摘要翻译: 两个虚拟操作系统(例如,S / 370VM,VSE或IX370和S / 88OS)的功能被合并到一个物理系统中。 S / 88处理器的合作伙伴对运行S / 88操作系统,并处理系统的容错和单系统映像方面。 S / 370处理器的一个或多个伙伴对直接和通过S / 88总线耦合到对应的S / 88处理器。 每个S / 370处理器从S / 88主存储器分配从1到16兆字节的连续存储。 每个S / 370虚拟操作系统认为其存储器分配从地址0开始,并且通过正常的S / 370动态存储器分配和寻呼技术管理其存储器.S / 370是限制检查,防止S / 370访问S / 88 内存空间。 S / 88操作系统是所有系统硬件和I / O设备的主控。 S / 88处理器直接响应于S / 88应用程序来访问S / 370地址空间,使得S / 88可以将I / O数据移动到S / 370 I / O缓冲器中并且分别处理S / 370 操作系统在单个系统环境中,而不会显着重写任一操作系统。 操作系统都不知道其他操作系统和其他处理器对。

    Fault tolerant data processing system
    10.
    发明授权
    Fault tolerant data processing system 失效
    容错数据处理系统

    公开(公告)号:US5325517A

    公开(公告)日:1994-06-28

    申请号:US353116

    申请日:1989-05-17

    摘要: The functions of two virtual operating systems (e.g., S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors access the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.

    摘要翻译: 两个虚拟操作系统(例如,S / 370VM,VSE或IX370和S / 88OS)的功能被合并到一个物理系统中。 S / 88处理器的合作伙伴对运行S / 88操作系统,并处理系统的容错和单系统映像方面。 S / 370处理器的一个或多个伙伴对直接和通过S / 88总线耦合到对应的S / 88处理器。 每个S / 370处理器从S / 88主存储器分配从1到16兆字节的连续存储。 每个S / 370虚拟操作系统认为其存储器分配从地址0开始,并且通过正常的S / 370动态存储器分配和寻呼技术管理其存储器。 S / 370被限制检查以防止S / 370访问S / 88存储器空间。 S / 88操作系统是所有系统硬件和I / O设备的主控。 S / 88处理器直接响应S / 88应用程序来访问S / 370地址空间,以便S / 88可以将I / O数据移动到S / 370 I / O缓冲器中并处理S / 370 I / O操作。 S / 88和S / 370对等体处理器对在单个系统环境中执行其各自的操作系统,而不会显着地重写任一操作系统。 操作系统都不知道其他操作系统和其他处理器对。