摘要:
A conductive coating composition and a method for producing coating layer using the same are disclosed. The conductive coating composition is capable of forming an antistatic coating layer on the protective film surface of display device. The conductive coating composition includes: 1 to 30 wt % of polyethylene dioxythiophene aqueous-dispersed solution; 5 to 15 wt % of water-soluble binder resin; 0.2 to 10 wt % of melamine resin; 6 to 40 wt % of alcohol solvent; 5 to 30 wt % of organic solvent selected from the group consisting of dimethyl sulfoxide, propyleneglycol methylether, N-methylpyrrolidone, ethyl-3-ethoxypropionate, propyleneglycol monomethyletheracetate, butylcarbitol and the mixtures thereof; and 10 to 50 wt % of water. The method for producing the conductive coating layer includes the steps of coating the conductive coating composition on a substrate; and drying the coating composition.
摘要:
A conductive coating composition and a method for producing coating layer using the same are disclosed. The conductive coating composition is capable of forming an antistatic coating layer on the protective film surface of display device. The conductive coating composition includes: 1 to 30 wt % of polyethylene dioxythiophene aqueous-dispersed solution; 5 to 15 wt % of water-soluble binder resin; 0.2 to 10 wt % of melamine resin; 6 to 40 wt % of alcohol solvent; 5 to 30 wt % of organic solvent selected from the group consisting of dimethyl sulfoxide, propyleneglycol methylether, N-methylpyrrolidone, ethyl-3-ethoxypropionate, propyleneglycol monomethyletheracetate, butylcarbitol and the mixtures thereof; and 10 to 50 wt % of water. The method for producing the conductive coating layer includes the steps of coating the conductive coating composition on a substrate; and drying the coating composition.
摘要:
Disclosed herein is a sliding/folding combination type portable digital communication apparatus that includes a body; a sliding folder having a first position in which it is constrained on the body, a second position in which it has slid a predetermined distance while continuously facing the body, and a third position in which it has rotated away from the body after the sliding in such a manner that it does not face the body; and a sliding hinge module positioned between the body and the sliding folder to travel together with the sliding folder and provide a force necessary for folding/unfolding the sliding folder. The user can conveniently use a single communication apparatus having the advantages of both sliding-type and folding-type apparatuses.
摘要:
An apparatus and method for controlling a plurality of speakers, comprising an amplifier for amplifying and outputting a play signal to be played over the speakers; and at least one sensor disposed proximal to at least one of the speakers for sensing at least one environmental condition and outputting sensing data to a controller, wherein the controller adjusts the play signal to compensate for environmental changes based on the sensing data.
摘要:
A data delay control circuit and method that can adaptively reflect changes in an operating environment, such as an operating temperature, an operating voltage and a manufacturing process of a semiconductor chip. The data delay control circuit is designed to be able to adaptibly delay data when an expected delay of a predetermined period should be required when the semiconductor chip is designed. The data delay circuit includes a clock oscillation unit that can reflect changes in a delay period of a delay cell and automatically adjust the delay period of the delay cell. Since the data delay circuit includes a monitoring circuit and a plurality of delay paths, the data delay circuit can provide a delay path having a desired delay value. Therefore, even when the operating environment of a semiconductor device changes, the data delay circuit can control the delay period of a data signal. Consequently, the data delay circuit can automatically generate a data delay signal according to the changes in the operating environment.
摘要:
A data delay control circuit and method that can adaptively reflect changes in an operating environment, such as an operating temperature, an operating voltage and a manufacturing process of a semiconductor chip. The data delay control circuit is designed to be able to adaptibly delay data when an expected delay of a predetermined period should be required when the semiconductor chip is designed. The data delay circuit includes a clock oscillation unit that can reflect changes in a delay period of a delay cell and automatically adjust the delay period of the delay cell. Since the data delay circuit includes a monitoring circuit and a plurality of delay paths, the data delay circuit can provide a delay path having a desired delay value. Therefore, even when the operating environment of a semiconductor device changes, the data delay circuit can control the delay period of a data signal. Consequently, the data delay circuit can automatically generate a data delay signal according to the changes in the operating environment.
摘要:
A data delay control circuit and method that can adaptively reflect changes in an operating environment, such as an operating temperature, an operating voltage and a manufacturing process of a semiconductor chip. The data delay control circuit is designed to be able to adaptibly delay data when an expected delay of a predetermined period should be required when the semiconductor chip is designed. The data delay circuit includes a clock oscillation unit that can reflect changes in a delay period of a delay cell and automatically adjust the delay period of the delay cell. Since the data delay circuit includes a monitoring circuit and a plurality of delay paths, the data delay circuit can provide a delay path having a desired delay value. Therefore, even when the operating environment of a semiconductor device changes, the data delay circuit can control the delay period of a data signal. Consequently, the data delay circuit can automatically generate a data delay signal according to the changes in the operating environment.
摘要:
A system-on-chip (SOC) having built-in-self-test (BIST) circuits and a self-test method of the SOC are provided. The SOC having the BIST circuits includes intellectual property (IP) blocks having BIST logic circuits and a BIST control unit. The BIST logic circuit operates in a normal or a test mode in response to control data received through a system bus, and outputs test result data in the test mode. The BIST control unit tests the IP blocks by transferring the control data, a command signal, test pattern data, and test address signals to the BIST logic circuit through the system bus, and compresses and stores the test result data received through the system bus in the test mode.
摘要:
A system-on-chip (SOC) having built-in-self-test (BIST) circuits and a self-test method of the SOC are provided. The SOC having the BIST circuits includes intellectual property (IP) blocks having BIST logic circuits and a BIST control unit. The BIST logic circuit operates in a normal or a test mode in response to control data received through a system bus, and outputs test result data in the test mode. The BIST control unit tests the IP blocks by transferring the control data, a command signal, test pattern data, and test address signals to the BIST logic circuit through the system bus, and compresses and stores the test result data received through the system bus in the test mode.
摘要:
A system-on-chip (SOC) having built-in-self-test (BIST) circuits and a self-test method of the SOC are provided. The SOC having the BIST circuits includes intellectual property (IP) blocks having BIST logic circuits and a BIST control unit. The BIST logic circuit operates in a normal or a test mode in response to control data received through a system bus, and outputs test result data in the test mode. The BIST control unit tests the IP blocks by transferring the control data, a command signal, test pattern data, and test address signals to the BIST logic circuit through the system bus, and compresses and stores the test result data received through the system bus in the test mode.