公开(公告)号：US5869375A

公开(公告)日：1999-02-09

申请号：US796038

申请日：1997-02-05

Applicant: Jong-Moon Choi ,  Young Jin Song ,  Chang Reol Kim

Inventor： Jong-Moon Choi ,  Young Jin Song ,  Chang Reol Kim

IPC: H01L29/78 ,  H01L21/336 ,  H01L29/423 ,  H01L29/739

CPC classification number: H01L29/78 ,  H01L29/66628

Abstract: A method for fabricating a transistor includes the steps of forming a gate insulation film on a substrate, forming a gate electrode on the gate insulation film and forming a first insulation film pattern on the gate electrode. A side wall spacer is formed at side surfaces of the first insulation film pattern and the gate electrode. The gate insulation film is etched to expose a portion of a surface of the substrate. An epitaxial layer is formed on the substrate where the gate insulation film is etched. The side wall spacer is removed and a thermal oxide film is grown on a portion corresponding to where the side wall spacer is removed and on an upper portion of the epitaxial layer. A source/drain region is formed by ion-implanting an impurity into the epitaxial layer.

Abstract translation: 一种制造晶体管的方法包括以下步骤：在衬底上形成栅极绝缘膜，在栅极绝缘膜上形成栅电极，并在栅电极上形成第一绝缘膜图案。 在第一绝缘膜图案和栅电极的侧表面处形成侧壁间隔物。 蚀刻栅极绝缘膜以暴露基板表面的一部分。 在栅极绝缘膜被蚀刻的基板上形成外延层。 除去侧壁间隔物，并且在与去除侧壁间隔物的部分相对应的部分上和在外延层的上部上生长热氧化膜。 通过将杂质离子注入到外延层中形成源/漏区。

公开(公告)号：US6030866A

公开(公告)日：2000-02-29

申请号：US859689

申请日：1997-05-21

Applicant: Jong-Moon Choi

Inventor： Jong-Moon Choi

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/108

CPC classification number: H01L27/10852 ,  H01L28/82 ,  H01L28/55

Abstract: A capacitor and a method of manufacturing a capacitor which includes the steps of sequentially forming an insulating layer and an etch stop layer over a semiconductor substrate; selectively etching the etch stop layer and the insulating layer to form a contact hole; forming a plug within the contact hole; forming a pillar on the etch stop layer adjacent to the plug and on the plug; forming a dielectric layer at the sides of the pillar; removing the pillar and forming a conductive layer over the dielectric layer; and forming an insulating layer over the conductive layer and etching the insulating layer and the conductive layer to expose the upper portion of the dielectric layer.

Abstract translation: 一种电容器和制造电容器的方法，包括在半导体衬底上顺序地形成绝缘层和蚀刻停止层的步骤; 选择性地蚀刻蚀刻停止层和绝缘层以形成接触孔; 在所述接触孔内形成插塞; 在所述蚀刻停止层上邻近所述插塞和所述插塞上形成柱; 在柱的侧面形成电介质层; 移除所述柱并在所述介电层上形成导电层; 以及在所述导电层上形成绝缘层，并蚀刻所述绝缘层和所述导电层以暴露所述电介质层的上部。

公开(公告)号：US5953618A

公开(公告)日：1999-09-14

申请号：US720966

申请日：1996-10-10

Applicant: Jong-Moon Choi

Inventor： Jong-Moon Choi

IPC: H01L27/04 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/108

CPC classification number: H01L27/10852 ,  H01L27/10817

Abstract: A method of forming a capacitor for a semiconductor memory device, includes the steps of forming first and second insulating layers to form a first contact hole on a substrate, forming a first conductive layer and a third insulating layer within the first contact hole so as to define a second contact hole, forming a second conductive layer within the second contact hole, removing the second and third insulating layers to form a storage electrode, and forming a dielectric layer and a third conductive layer on the storage electrode to form a capacitor.

Abstract translation: 一种形成用于半导体存储器件的电容器的方法包括以下步骤：形成第一和第二绝缘层，以在衬底上形成第一接触孔，在第一接触孔内形成第一导电层和第三绝缘层，以便 限定第二接触孔，在第二接触孔内形成第二导电层，去除第二绝缘层和第三绝缘层以形成存储电极，并在存储电极上形成电介质层和第三导电层以形成电容器。