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公开(公告)号：US08302059B2
公开(公告)日：2012-10-30
申请号：US12994508
申请日：2009-05-25
IPC分类号： G06F17/50
CPC分类号： G06F17/5072
摘要： A method of designing a power switch block (200) for an integrated circuit layout in a predefined integrated circuit technology is disclosed. The power switch block (200) includes a segment (710) comprising a plurality of spaced parallel conductors (110, 120, 130, 140) each having a predefined height in said technology, a stack of a first power switch (115) of a first conductivity type and a pair of drivers (152; 154) for respectively driving the first power switch (115) and a second power switch (135), said drivers having predefined dimensions in said technology, and the second switch (135) of a second conductivity type. The method comprises providing respective predefined width/length ratios for said power switches (115; 135); determining a total height of the segment (710) from the sum of the predefined heights of the individual conductors (110; 120; 130; 140) and respective spacings (310; 320) between said individual conductors, determining the height of the first transistor (115) from the difference between the total height and the predefined driver height; determining the width of the first transistor (115) from the combined predefined widths of the pair of drivers (152; 154); optimizing the first power switch layout within its determined height and width based on its predefined width/length ratio; and optimizing the second power switch layout based on its predefined width/height ratio.
摘要翻译： 公开了一种在预定义的集成电路技术中设计用于集成电路布局的功率开关块（200）的方法。 功率开关块（200）包括一个段（710），其包括多个间隔开的平行导体（110,120,130,140），每个导体在所述技术中具有预定高度，第一电源开关（115） 第一导电类型和用于分别驱动第一电力开关（115）和第二电力开关（135）的一对驱动器（152; 154），所述驱动器在所述技术中具有预定尺寸，并且第二开关（135） 第二导电类型。 该方法包括为所述功率开关（115; 135）提供相应的预定宽度/长度比; 从各个导体（110; 120; 130; 140）的预定高度和各个导体之间的相应间隔（310; 320）的总和确定段（710）的总高度，确定第一晶体管 （115）从总高度和预定义的驾驶员高度之间的差异; 从所述一对驱动器（152; 154）的组合的预定宽度确定所述第一晶体管（115）的宽度; 基于其预定的宽度/长度比，在其确定的高度和宽度内优化第一功率开关布局; 并基于其预定义的宽/高比优化第二功率开关布局。
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公开(公告)号：US20110083116A1
公开(公告)日：2011-04-07
申请号：US12994508
申请日：2009-05-25
IPC分类号： G06F17/50
CPC分类号： G06F17/5072
摘要： A method of designing a power switch block (200) for an integrated circuit layout in a predefined integrated circuit technology is disclosed. The power switch block (200) includes a segment (710) comprising a plurality of spaced parallel conductors (110, 120, 130, 140) each having a predefined height in said technology, a stack of a first power switch (115) of a first conductivity type and a pair of drivers (152; 154) for respectively driving the first power switch (115) and a second power switch (135), said drivers having predefined dimensions in said technology, and the second switch (135) of a second conductivity type. The method comprises providing respective predefined width/length ratios for said power switches (115; 135); determining a total height of the segment (710) from the sum of the predefined heights of the individual conductors (110; 120; 130; 140) and respective spacings (310; 320) between said individual conductors, determining the height of the first transistor (115) from the difference between the total height and the predefined driver height; determining the width of the first transistor (115) from the combined predefined widths of the pair of drivers (152; 154); optimizing the first power switch layout within its determined height and width based on its predefined width/length ratio; and optimizing the second power switch layout based on its predefined width/height ratio.
摘要翻译： 公开了一种在预定义的集成电路技术中设计用于集成电路布局的功率开关块（200）的方法。 功率开关块（200）包括一个段（710），其包括多个间隔开的平行导体（110,120,130,140），每个导体在所述技术中具有预定高度，第一电源开关（115） 第一导电类型和用于分别驱动第一电力开关（115）和第二电力开关（135）的一对驱动器（152; 154），所述驱动器在所述技术中具有预定尺寸，并且第二开关（135） 第二导电类型。 该方法包括为所述功率开关（115; 135）提供相应的预定宽度/长度比; 从各个导体（110; 120; 130; 140）的预定高度和各个导体之间的相应间隔（310; 320）的总和确定段（710）的总高度，确定第一晶体管 （115）从总高度和预定义的驾驶员高度之间的差异; 从所述一对驱动器（152; 154）的组合的预定宽度确定所述第一晶体管（115）的宽度; 基于其预定的宽度/长度比，在其确定的高度和宽度内优化第一功率开关布局; 并基于其预定义的宽/高比优化第二功率开关布局。
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公开(公告)号：US09100001B2
公开(公告)日：2015-08-04
申请号：US13208819
申请日：2011-08-12
申请人： Cas Groot , Rinze Meijer
发明人： Cas Groot , Rinze Meijer
CPC分类号： H03K19/0013
摘要： Power switching is facilitated. In accordance with one or more embodiments, a power-switch apparatus includes a plurality of switches coupled between a voltage supply and a switched voltage output. A test control circuit operates the switches for testing a subset thereof, therein indicating a condition of the subset, which may be indicated independently from a condition of the power-switch apparatus as a whole. In some implementations, on-chip current loads are applied to emulate off-chip loads for testing the subset of switches, or individual switches.
摘要翻译： 电源切换方便。 根据一个或多个实施例，功率开关装置包括耦合在电压源和开关电压输出之间的多个开关。 测试控制电路操作用于测试其子集的开关，其中指示子集的状态，其可以独立于电力开关装置整体的状态来指示。 在一些实现中，应用片上电流负载来模拟片外负载以测试开关子集或各个开关。
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公开(公告)号：US08723592B2
公开(公告)日：2014-05-13
申请号：US13208882
申请日：2011-08-12
申请人： Rinze Meijer , Cas Groot , Gerard Villar Pique
发明人： Rinze Meijer , Cas Groot , Gerard Villar Pique
IPC分类号： H03K3/01
CPC分类号： G06F1/3296 , G06F1/3287 , Y02D10/171 , Y02D10/172
摘要： Body biasing circuit and methods are implemented in a variety of different instances. One such instance involves placing, a first well of a first body bias island and a second well of a second body bias island in a first bias mode by controlling switches of a body bias switch circuit. The biasing is one of a reverse body bias, a nominal body bias and a forward body bias. The second well is also biased according to one of a reverse body bias, a nominal body bias and a forward body bias. In response to the bias-mode input, the first well of the first body bias island and the second well of the second body bias island are each placed in a second bias mode by controlling switches of the body bias switch circuit. The bias of the first well and second well can be changed.
摘要翻译： 主体偏置电路和方法在各种不同的实例中实现。 一个这种情况涉及通过控制体偏置开关电路的开关来将第一体偏置岛的第一阱和第二体偏置岛的第二阱置于第一偏置模式中。 偏置是反向偏置，标称体偏和正向偏置之一。 第二个井还根据反向偏置，标称体偏和正向偏置之一进行偏置。 响应于偏置模式输入，通过控制体偏置开关电路的开关，第一体偏置岛的第一阱和第二体偏置岛的第二阱各自被置于第二偏置模式。 第一口井和第二口井的偏差可以改变。
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公开(公告)号：US09424896B2
公开(公告)日：2016-08-23
申请号：US13531297
申请日：2012-06-22
申请人： Cas Groot , Maurits Storms
发明人： Cas Groot , Maurits Storms
CPC分类号： G11C7/20 , G06F1/3275 , G06F3/0632 , G06F3/065 , G06F11/1402 , G06F12/0646 , G06F15/177 , G11C16/20
摘要： Embodiments of a method for operating a computer system are disclosed. In one embodiment, the memory unit has a non-volatile memory array and processing logic and the non-volatile memory array stores initialization data that is used by the processing logic to perform input/output operations of the memory unit. The method involves storing the initialization data in retention registers within the memory unit, wherein the retention registers are separate from the non-volatile memory array and retain data while the memory unit is power gated, using the stored initialization data in the retention registers to initialize the memory unit upon exiting the power gating.
摘要翻译： 公开了一种用于操作计算机系统的方法的实施例。 在一个实施例中，存储器单元具有非易失性存储器阵列和处理逻辑，并且非易失性存储器阵列存储由处理逻辑用于执行存储器单元的输入/输出操作的初始化数据。 该方法包括将初始化数据存储在存储器单元内的保持寄存器中，其中保持寄存器与非易失性存储器阵列分离并且在存储器单元被电源门控时保留数据，使用保留寄存器中存储的初始化数据来初始化 存储单元退出电源门控时。
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公开(公告)号：US20130346733A1
公开(公告)日：2013-12-26
申请号：US13531297
申请日：2012-06-22
申请人： Cas Groot , Maurits Storms
发明人： Cas Groot , Maurits Storms
IPC分类号： G06F15/177 , G06F1/26
CPC分类号： G11C7/20 , G06F1/3275 , G06F3/0632 , G06F3/065 , G06F11/1402 , G06F12/0646 , G06F15/177 , G11C16/20
摘要： Embodiments of a method for operating a computer system are disclosed. In one embodiment, the memory unit has a non-volatile memory array and processing logic and the non-volatile memory array stores initialization data that is used by the processing logic to perform input/output operations of the memory unit. The method involves storing the initialization data in retention registers within the memory unit, wherein the retention registers are separate from the non-volatile memory array and retain data while the memory unit is power gated, using the stored initialization data in the retention registers to initialize the memory unit upon exiting the power gating.
摘要翻译： 公开了一种用于操作计算机系统的方法的实施例。 在一个实施例中，存储器单元具有非易失性存储器阵列和处理逻辑，并且非易失性存储器阵列存储由处理逻辑用于执行存储器单元的输入/输出操作的初始化数据。 该方法包括将初始化数据存储在存储器单元内的保持寄存器中，其中保持寄存器与非易失性存储器阵列分离并且在存储器单元被电源门控时保留数据，使用保留寄存器中存储的初始化数据来初始化 存储单元退出电源门控时。
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公开(公告)号：US20130038382A1
公开(公告)日：2013-02-14
申请号：US13208882
申请日：2011-08-12
申请人： Rinze Meijer , Cas Groot , Gerard Villar Pique
发明人： Rinze Meijer , Cas Groot , Gerard Villar Pique
IPC分类号： G05F1/10
CPC分类号： G06F1/3296 , G06F1/3287 , Y02D10/171 , Y02D10/172
摘要： Body biasing circuit and methods are implemented in a variety of different instances. One such instance involves placing, a first well of a first body bias island and a second well of a second body bias island in a first bias mode by controlling switches of a body bias switch circuit. The biasing is one of a reverse body bias, a nominal body bias and a forward body bias. The second well is also biased according to one of a reverse body bias, a nominal body bias and a forward body bias. In response to the bias-mode input, the first well of the first body bias island and the second well of the second body bias island are each placed in a second bias mode by controlling switches of the body bias switch circuit. The bias of the first well and second well can be changed.
摘要翻译： 主体偏置电路和方法在各种不同的实例中实现。 一个这种情况涉及通过控制体偏置开关电路的开关来将第一体偏置岛的第一阱和第二体偏置岛的第二阱置于第一偏置模式中。 偏置是反向偏置，标称体偏和正向偏置之一。 第二个井还根据反向偏置，标称体偏和正向偏置之一进行偏置。 响应于偏置模式输入，通过控制体偏置开关电路的开关，第一体偏置岛的第一阱和第二体偏置岛的第二阱各自被置于第二偏置模式。 第一口井和第二口井的偏差可以改变。
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公开(公告)号：US20130038361A1
公开(公告)日：2013-02-14
申请号：US13208819
申请日：2011-08-12
申请人： Cas Groot , Rinze Meijer
发明人： Cas Groot , Rinze Meijer
IPC分类号： H03L7/24
CPC分类号： H03K19/0013
摘要： Power switching is facilitated. In accordance with one or more embodiments, a power-switch apparatus includes a plurality of switches coupled between a voltage supply and a switched voltage output. A test control circuit operates the switches for testing a subset thereof, therein indicating a condition of the subset, which may be indicated independently from a condition of the power-switch apparatus as a whole. In some implementations, on-chip current loads are applied to emulate off-chip loads for testing the subset of switches, or individual switches.
摘要翻译： 电源切换方便。 根据一个或多个实施例，功率开关装置包括耦合在电压源和开关电压输出之间的多个开关。 测试控制电路操作用于测试其子集的开关，其中指示子集的状态，其可以独立于电力开关装置整体的状况来指示。 在一些实现中，应用片上电流负载来模拟片外负载以测试开关子集或各个开关。
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