公开(公告)号：US09141402B2

公开(公告)日：2015-09-22

申请号：US11410301

申请日：2006-04-25

申请人： Joseph Raymond Hewitt ,  Sreekant S. Kotay ,  Corey Robert Lucier ,  David G. Besbris ,  Todd C. Brannam ,  Veronica Marie Early ,  Peter David Hirschberg ,  Ke Ning ,  John D. Robinson ,  Michael Gary Wright

发明人： Joseph Raymond Hewitt ,  Sreekant S. Kotay ,  Corey Robert Lucier ,  David G. Besbris ,  Todd C. Brannam ,  Veronica Marie Early ,  Peter David Hirschberg ,  Ke Ning ,  John D. Robinson ,  Michael Gary Wright

IPC分类号： G06F17/30 ,  G06F9/44

CPC分类号： G06F3/0484 ,  G06F3/0482 ,  G06F9/451

摘要： A system for providing a user interface includes a gadget definition, a style definition, and a scene file. The gadget definition includes one or more XML-based gadget definition tags defining a gadget element and the style definition includes one or more XML-based style definition tags defining one or more style attributes to be applied to the gadget element. The scene file is an XML-based document that includes a gadget element tag that specifies the gadget element. The system further includes a parser to parse the scene file, the style definition, and the gadget definition, and to generate an object that includes a gadget object corresponding to the gadget element. The system also includes a layout engine to determine, based on the object model, a layout of the user interface, and a rendering engine to render, based on the determined layout, the user interface including the gadget element.

摘要翻译： 用于提供用户界面的系统包括小工具定义，风格定义和场景文件。 小工具定义包括定义小工具元素的一个或多个基于XML的小工具定义标签，并且样式定义包括一个或多个基于XML的样式定义标签，定义要应用于小工具元素的一个或多个样式属性。 场景文件是一个基于XML的文档，其中包含一个指定小工具元素的小工具元素标签。 该系统还包括解析场景文件，样式定义和小工具定义的解析器，并且生成包括与该小工具元素相对应的小工具对象的对象。 该系统还包括布局引擎，用于基于对象模型确定用户界面的布局，以及渲染引擎，基于所确定的布局来呈现包括小工具元素的用户界面。

公开(公告)号：US08509567B2

公开(公告)日：2013-08-13

申请号：US12136492

申请日：2008-06-10

申请人： Mark Cox ,  Vladimir Botchev ,  Ke Ning ,  Wei Zhang ,  Marc Hoffman

发明人： Mark Cox ,  Vladimir Botchev ,  Ke Ning ,  Wei Zhang ,  Marc Hoffman

IPC分类号： G06K9/32 ,  G06F7/38 ,  G09G5/00

CPC分类号： H04N19/43 ,  H04N19/436 ,  H04N19/523 ,  H04N19/59 ,  H04N19/80

摘要： Methods and an apparatus are provided for interpolation of pixels in a pixel array having rows and columns of pixels. The apparatus includes a shift register array to shift pixel values of the pixel array, the shift register array including two or more shift registers; an interpolation filter array interconnected to the shift register array, the interpolation filter array including one or more interpolation filters; and a controller configured to provide pixel values in columns of the pixel array from the shift register array to respective interpolation filters in a first mode and configured to provide pixel values in rows of the pixel array from the shift register array to respective interpolation filters in a second mode. The controller may be configured to supply vertical sub-pixel values from the shift register array to the interpolation filters to generate diagonal sub-pixel values.

摘要翻译： 提供了用于内插具有行和列像素的像素阵列中的像素的方法和装置。 该装置包括用于移位像素阵列的像素值的移位寄存器阵列，该移位寄存器阵列包括两个或多个移位寄存器; 互连到移位寄存器阵列的插值滤波器阵列，所述插值滤波器阵列包括一个或多个插值滤波器; 以及控制器，被配置为以第一模式将来自移位寄存器阵列的像素阵列的列中的像素值提供给第一模式的各个内插滤波器，并且被配置为将像素阵列中的像素值从移位寄存器阵列提供给相应的内插滤波器 第二模式。 控制器可以被配置为将来自移位寄存器阵列的垂直子像素值提供给内插滤波器以产生对角子像素值。

公开(公告)号：US20090300337A1

公开(公告)日：2009-12-03

申请号：US12156007

申请日：2008-05-29

申请人： Xiaolin Wang ,  Qian Wu ,  Benjamin Marshall ,  Fugui Wang ,  Gregory Pitarys ,  Ke Ning

发明人： Xiaolin Wang ,  Qian Wu ,  Benjamin Marshall ,  Fugui Wang ,  Gregory Pitarys ,  Ke Ning

IPC分类号： G06F9/30

CPC分类号： G06F9/30145 ,  G06F9/30181 ,  G06F9/3867 ,  G06F9/3885 ,  G06F9/3897

摘要： Improved instruction set and core design, control and communication for programmable microprocessors is disclosed, involving the strategy for replacing centralized program sequencing in present-day and prior art processors with a novel distributed program sequencing wherein each functional unit has its own instruction fetch and decode block, and each functional unit has its own local memory for program storage; and wherein computational hardware execution units and memory units are flexibly pipelined as programmable embedded processors with reconfigurable pipeline stages of different order in response to varying application instruction sequences that establish different configurations and switching interconnections of the hardware units.

摘要翻译： 公开了针对可编程微处理器的改进的指令集和核心设计，控制和通信，其涉及用新的分布式程序排序代替当前和现有技术处理器中的集中程序排序的策略，其中每个功能单元具有其自己的指令获取和解码块 ，并且每个功能单元具有其自己的用于程序存储的本地存储器; 并且其中响应于建立硬件单元的不同配置和切换互连的变化的应用指令序列，计算硬件执行单元和存储器单元被灵活地流水线化为具有不同顺序的可重新配置流水线级的可编程嵌入式处理器。

公开(公告)号：US20070160288A1

公开(公告)日：2007-07-12

申请号：US11638951

申请日：2006-12-14

申请人： Marc Hoffman ,  Wei Zhang ,  Ke Ning

发明人： Marc Hoffman ,  Wei Zhang ,  Ke Ning

IPC分类号： G06K9/00 ,  G06K9/34

CPC分类号： H04N5/147 ,  G06K9/00711 ,  H04N19/137 ,  H04N19/14 ,  H04N19/17 ,  H04N19/87

摘要： A system and method for scene change detection in a video sequence employing a randomly sub-sampled partition voting (RSPV) algorithm is provided. In the video sequence, a current frame is divided into a number of partitions. Each partition is randomly sub-sampled and a histogram of the pixel intensity values is built to determine whether the current partition differs from the corresponding partition in a reference frame. A bin-by-bin absolute histogram difference between a partition in the current frame and a co-located partition in the reference frame is calculated. The histogram difference is compared to an adaptive threshold. If the majority of the examined partitions has significant changes, a scene change is detected. The RSPV algorithm is motion-independent and characterized by a significantly reduced cost of memory access and computations.

摘要翻译： 提供了一种使用随机子采样分区投票（RSPV）算法的视频序列中的场景变化检测的系统和方法。 在视频序列中，当前帧被划分成多个分区。 每个分区被随机子采样，并且构建像素强度值的直方图以确定当前分区是否与参考帧中的对应分区不同。 计算当前帧中的分区与参考帧中的同位置分区之间的逐位绝对直方图差异。 将直方图差异与自适应阈值进行比较。 如果被检查的大部分分区有显着的变化，则检测到场景变化。 RSPV算法是运​​动无关的，其特征在于显着降低了存储器访问和计算的成本。

公开(公告)号：US08406303B2

公开(公告)日：2013-03-26

申请号：US11638838

申请日：2006-12-14

申请人： Marc Hoffman ,  Wei Zhang ,  Raka Singh ,  Ke Ning

发明人： Marc Hoffman ,  Wei Zhang ,  Raka Singh ,  Ke Ning

IPC分类号： H04N11/04

CPC分类号： H04N19/57 ,  G06T7/223 ,  H04N19/523 ,  H04N19/533 ,  H04N19/557 ,  H04N19/56

摘要： A method and apparatus utilizing a prediction guided decimated search motion estimation algorithm are provided. The prediction guided decimated search motion estimation algorithm generates a motion vector used to encode a macroblock in a frame from a video sequence. The algorithm includes generating full-pixel seed vectors, performing a full-pixel search around the generated seed vectors, which is followed by a fractional pixel search. The full-pixel seed vectors generated are a predicted motion vector and a hierarchical motion vector. A fractional pixel search may be conducted around a final motion vector generated by the full-pixel search and may include a half-pixel search and a quarter-pixel search. The prediction guided decimated search motion estimation algorithm can be implemented in both software and hardware. The algorithm is characterized by improved efficiency, scalability, and decreased complexity.

摘要翻译： 提供了利用预测引导抽取搜索运动估计算法的方法和装置。 预测引导抽取搜索运动估计算法生成用于对来自视频序列的帧中的宏块进行编码的运动矢量。 该算法包括生成全像素种子矢量，围绕生成的种子矢量执行全像素搜索，其后跟分数像素搜索。 生成的全像素种子矢量是预测运动矢量和分层运动矢量。 可以围绕由全像素搜索生成的最终运动矢量进行分数像素搜索，并且可以包括半像素搜索和四分之一像素搜索。 预测引导的抽取搜索运动估计算法可以在软件和硬件两个方面实现。 该算法的特征在于提高效率，可扩展性和降低的复杂性。

公开(公告)号：US08181003B2

公开(公告)日：2012-05-15

申请号：US12156007

申请日：2008-05-29

申请人： Xiaolin Wang ,  Qian Wu ,  Benjamin Marshall ,  Fugui Wang ,  Gregory Pitarys ,  Ke Ning

发明人： Xiaolin Wang ,  Qian Wu ,  Benjamin Marshall ,  Fugui Wang ,  Gregory Pitarys ,  Ke Ning

IPC分类号： G06F9/30

CPC分类号： G06F9/30145 ,  G06F9/30181 ,  G06F9/3867 ,  G06F9/3885 ,  G06F9/3897

摘要： Improved instruction set and core design, control and communication for programmable microprocessors is disclosed, involving the strategy for replacing centralized program sequencing in present-day and prior art processors with a novel distributed program sequencing wherein each functional unit has its own instruction fetch and decode block, and each functional unit has its own local memory for program storage; and wherein computational hardware execution units and memory units are flexibly pipelined as programmable embedded processors with reconfigurable pipeline stages of different order in response to varying application instruction sequences that establish different configurations and switching interconnections of the hardware units.

摘要翻译： 公开了针对可编程微处理器的改进的指令集和核心设计，控制和通信，其涉及用新的分布式程序排序代替当前和现有技术处理器中的集中程序排序的策略，其中每个功能单元具有其自己的指令获取和解码块 ，并且每个功能单元具有其自己的用于程序存储的本地存储器; 并且其中响应于建立硬件单元的不同配置和切换互连的变化的应用指令序列，计算硬件执行单元和存储器单元被灵活地流水线化为具有不同顺序的可重新配置流水线级的可编程嵌入式处理器。

公开(公告)号：US20070183504A1

公开(公告)日：2007-08-09

申请号：US11638838

申请日：2006-12-14

申请人： Marc Hoffman ,  Wei Zhang ,  Raka Singh ,  Ke Ning

发明人： Marc Hoffman ,  Wei Zhang ,  Raka Singh ,  Ke Ning

IPC分类号： H04N11/02 ,  H04N7/12

CPC分类号： H04N19/57 ,  G06T7/223 ,  H04N19/523 ,  H04N19/533 ,  H04N19/557 ,  H04N19/56

摘要： A method and apparatus utilizing a prediction guided decimated search motion estimation algorithm are provided. The prediction guided decimated search motion estimation algorithm generates a motion vector used to encode a macroblock in a frame from a video sequence. The algorithm includes generating full-pixel seed vectors, performing a full-pixel search around the generated seed vectors, which is followed by a fractional pixel search. The full-pixel seed vectors generated are a predicted motion vector and a hierarchical motion vector. A fractional pixel search may be conducted around a final motion vector generated by the full-pixel search and may include a half-pixel search and a quarter-pixel search. The prediction guided decimated search motion estimation algorithm can be implemented in both software and hardware. The algorithm is characterized by improved efficiency, scalability, and decreased complexity.

摘要翻译： 提供了利用预测引导抽取搜索运动估计算法的方法和装置。 预测引导抽取搜索运动估计算法生成用于对来自视频序列的帧中的宏块进行编码的运动矢量。 该算法包括生成全像素种子矢量，围绕生成的种子矢量执行全像素搜索，其后跟分数像素搜索。 生成的全像素种子矢量是预测运动矢量和分层运动矢量。 可以围绕由全像素搜索生成的最终运动矢量进行分数像素搜索，并且可以包括半像素搜索和四分之一像素搜索。 预测引导的抽取搜索运动估计算法可以在软件和硬件两个方面实现。 该算法的特征在于提高效率，可扩展性和降低的复杂性。

公开(公告)号：US20060259870A1

公开(公告)日：2006-11-16

申请号：US11410301

申请日：2006-04-25

申请人： Joseph Hewitt ,  Sreekant Kotay ,  Corey Lucier ,  David Besbris ,  Todd Brannam ,  Veronica Early ,  Peter Hirschberg ,  Ke Ning ,  John Robinson ,  Michael Wright

发明人： Joseph Hewitt ,  Sreekant Kotay ,  Corey Lucier ,  David Besbris ,  Todd Brannam ,  Veronica Early ,  Peter Hirschberg ,  Ke Ning ,  John Robinson ,  Michael Wright

IPC分类号： G06F3/00 ,  G06F17/00 ,  G06F9/44

CPC分类号： G06F3/0484 ,  G06F3/0482 ,  G06F9/451

摘要： A system for providing a user interface includes a gadget definition, a style definition, and a scene file. The gadget definition includes one or more XML-based gadget definition tags defining a gadget element and the style definition includes one or more XML-based style definition tags defining one or more style attributes to be applied to the gadget element. The scene file is an XML-based document that includes a gadget element tag that specifies the gadget element. The system further includes a parser to parse the scene file, the style definition, and the gadget definition, and to generate an object that includes a gadget object corresponding to the gadget element. The system also includes a layout engine to determine, based on the object model, a layout of the user interface, and a rendering engine to render, based on the determined layout, the user interface including the gadget element.

公开(公告)号：US06771271B2

公开(公告)日：2004-08-03

申请号：US10170604

申请日：2002-06-13

申请人： Ke Ning ,  Marc Hoffman ,  Gabby Yi

发明人： Ke Ning ,  Marc Hoffman ,  Gabby Yi

IPC分类号： G06F1300

CPC分类号： G06T1/60

摘要： A relatively high speed circular memory device, in combination with other processes, improves image processing efficiency. To that end, a method and apparatus of processing image data stored in an initial memory logically divides the image into a plurality of contiguous strips. A first plurality of the strips are stored in a working memory having a circular addressing arrangement, where the working memory is faster than the initial memory and has a plurality of sequential address locations. The first plurality of strips are contiguous and have a start address. In addition, the first plurality of strips are stored in the working memory in a contiguous manner, and processed through the working memory relative to the start address.

摘要翻译： 与其他工艺相结合的相对高速的圆形存储器件提高了图像处理效率。 为此，将存储在初始存储器中的图像数据进行处理的方法和装置将图像逻辑地划分成多个连续的条带。 第一组多个条被存储在具有圆形寻址布置的工作存储器中，其中工作存储器比初始存储器快，并且具有多个顺序地址位置。 第一组多个条带是连续的并且具有起始地址。 此外，第一多个条以连续的方式存储在工作存储器中，并且通过工作存储器相对于起始地址进行处理。

公开(公告)号：US08078833B2

公开(公告)日：2011-12-13

申请号：US12156006

申请日：2008-05-29

申请人： Xiaolin Wang ,  Qian Wu ,  Benjamin Marshall ,  Fugui Wang ,  Ke Ning ,  Gregory Pitarys

发明人： Xiaolin Wang ,  Qian Wu ,  Benjamin Marshall ,  Fugui Wang ,  Ke Ning ,  Gregory Pitarys

IPC分类号： G06F15/00 ,  G06F15/76

CPC分类号： G06F5/015 ,  G06F9/30014 ,  G06F9/30181 ,  G06F9/3873 ,  G06F9/3875 ,  G06F9/3897

摘要： The invention resides in a flexible data pipeline structure for accommodating software computational instructions for varying application programs and having a programmable embedded processor with internal pipeline stages the order and length of which varies as fast as every clock cycle based on the instruction sequence in an application program preloaded into the processor, and wherein the processor includes a data switch matrix selectively and flexibly interconnecting pluralities of mathematical execution units and memory units in response to said instructions, and wherein the execution units are configurable to perform operations at different precisions of multi-bit arithmetic and logic operations and in a multi-level hierarchical architecture structure.

摘要翻译： 本发明涉及一种灵活的数据流水线结构，用于容纳用于变化的应用程序的软件计算指令，并且具有可编程嵌入式处理器，其具有内部流水线阶段，其顺序和长度基于应用程序中的指令序列而变化为每个时钟周期快 并且其中所述处理器包括数据交换矩阵，所述数据交换矩阵响应于所述指令选择性地和灵活地互连多个数学执行单元和存储器单元，并且其中所述执行单元可配置为以不同精度执行多位运算 逻辑运算和多级分层结构。