公开(公告)号：US06479398B1

公开(公告)日：2002-11-12

申请号：US09692247

申请日：2000-10-18

申请人： Jr-Hong Chen ,  Jeng-Hung Sun ,  Hsixg-Ju Sung ,  Pi-Fu Chen ,  Dou-I Chen

发明人： Jr-Hong Chen ,  Jeng-Hung Sun ,  Hsixg-Ju Sung ,  Pi-Fu Chen ,  Dou-I Chen

IPC分类号： H01L21302

CPC分类号： H01L29/66765 ,  H01L29/78669

摘要： A structure of an amorphous-silicon thin film transistor array comprises a substrate, a gate electrode, a gate insulating layer, an amorphous-silicon active layer, an n+ amorphous-silicon layer and a metal layer. The metal layer defines a source electrode and a drain electrode. The structure simplifies the photolithography process by using a less number of masks to manufacture thin film transistors. It also reduces the occurrence of open circuits in the first metal (MI) layer or short circuits between the MI layer and the second metal (MII) layer caused by the photoresist residue or particle contamination. The manufacturing method combines a conventional back-channel-etched (BCE) reduced mask process and a two-step exposure technology. The two-step exposure technology uses two photoresist pattern masks. One is a pattern mask for complete exposure with higher light intensity and the other is a pattern mask for incomplete exposure with lower light intensity. The photoresist pattern with incomplete exposure is then etched by an O2 plasma etching process. The amorphous-silicon layer and the metal layer has the characteristic of an island metal masking structure that protects the active layer from plasma damage in plasma etching process.

摘要翻译： 非晶硅薄膜晶体管阵列的结构包括基板，栅电极，栅绝缘层，非晶硅有源层，n +非晶硅层和金属层。 金属层限定了源电极和漏电极。 该结构通过使用较少数量的掩模来制造薄膜晶体管来简化光刻工艺。 它还减少了第一金属（MI）层中的开路的发生或由光致抗蚀剂残留物或颗粒污染引起的MI层和第二金属（MII）层之间的短路。 该制造方法结合了常规的背沟道蚀刻（BCE）减少掩模工艺和两步曝光技术。 两步曝光技术使用两个光刻胶图案掩模。 一种是具有较高光强度的完全曝光的图案掩模，另一种是具有较低光强度的不完全曝光的图案掩模。 然后通过O 2等离子体蚀刻工艺蚀刻具有不完全曝光的光致抗蚀剂图案。 非晶硅层和金属层具有在等离子体蚀刻工艺中保护有源层免受等离子体损伤的岛金属掩蔽结构的特征。

公开(公告)号：US20090135160A1

公开(公告)日：2009-05-28

申请号：US12275784

申请日：2008-11-21

申请人： Jeng-Hung Sun

发明人： Jeng-Hung Sun

IPC分类号： G06F3/045

CPC分类号： G06F3/044

摘要： A capacitive type touch panel includes: a transparent substrate; and a transparent touch control unit disposed on the substrate and including a plurality of spaced apart transparent key pads that are made from a transparent electrically conductive material, and a transparent electrically conductive reference potential member that is associated operatively and electrically with the transparent key pads to generate a charge distribution between two adjacent ones of the transparent key pads, thereby forming virtual key pads among the transparent key pads.

摘要翻译： 电容型触摸面板包括：透明基板; 以及透明触摸控制单元，其设置在所述基板上并且包括由透明导电材料制成的多个间隔开的透明键盘，以及透明导电参考电位构件，其与所述透明键盘可操作地和电气地相关联， 在两个相邻的透明键盘之间产生电荷分布，从而在透明键盘之间形成虚拟键盘。

公开(公告)号：US06586768B1

公开(公告)日：2003-07-01

申请号：US09702154

申请日：2000-10-30

申请人： Tinghui Huang ,  Jeng-Hung Sun

发明人： Tinghui Huang ,  Jeng-Hung Sun

IPC分类号： H01L2900

CPC分类号： H01L29/66765 ,  H01L29/4908 ,  H01L29/78636

摘要： A method for fabricating a thin film transistor that has a multi-layered gate structure of large thickness and the transistors formed are disclosed. In the method, an organic polymeric material layer is spin-coated to planarize a metal gate that has a second metal material deposited in a thin layer on the gate. A suitable metal coating material is molybdenum. A novel planarization process by dry etching is then carried out utilizing a UV spectrum of Mo in an end point detection method to remove all the organic polymeric material from a top planar surface of the metal gate (and the metal coating layer) and then stopping the dry etching process. A dielectric material layer such as silicon nitride is then deposited on top of the metal gate and the remaining organic polymeric material layer to complete the isolation process for the gate. The present invention novel method of utilizing an additional metal coating layer on the metal gate therefore allows an easy identification of the end point in the planarization process wherein an organic polymeric material layer provides a base for depositing a dielectric material thereon for insulating the metal gate. Problems normally associated with the conventional method of insulating a thick metal gate, such as step coverage and void formation problems are thus eliminated in the present invention method.

摘要翻译： 公开了一种制造具有厚度大的多层栅极结构和形成晶体管的薄膜晶体管的方法。 在该方法中，旋涂有机聚合材料层以使具有沉积在栅极上的薄层中的第二金属材料的金属栅平坦化。 合适的金属涂层材料是钼。 然后使用终点检测方法中的Mo的UV光谱，从金属栅极（和金属涂层）的顶部平坦表面去除所有有机聚合物材料，然后停止 干蚀刻工艺。 然后将诸如氮化硅的介电材料层沉积在金属栅极和剩余的有机聚合物材料层的顶部上，以完成栅极的隔离工艺。 因此，在金属栅上利用附加金属涂层的本发明的新颖方法因此允许在平坦化工艺中容易地识别端点，其中有机聚合物材料层提供用于在其上沉积介电材料的基底以绝缘金属栅极。 因此，在本发明的方法中，消除了常规与厚金属栅绝缘方法相关的问题，例如台阶覆盖和空隙形成问题。

公开(公告)号：US06482682B2

公开(公告)日：2002-11-19

申请号：US09792215

申请日：2001-02-20

申请人： Jeng-Hung Sun ,  Wen-Tung Wang

发明人： Jeng-Hung Sun ,  Wen-Tung Wang

IPC分类号： H01L2176

CPC分类号： H01L29/66757 ,  H01L29/78609 ,  H01L29/78675

摘要： The invention discloses a manufacturing method for improving the reliability of polysilicon thin film transistors to solve electric leaking problem due to the roughness of polysilicon layer surface. In the thin film transistor manufacturing process, a polysilicon layer surface is oxidized to produce a silicon oxide layer which is then removed by an etching solution. This method can planarize bumps on the polysilicon layer generated due to re-crystallization so as to effectively lower the roughness of the polysilicon surface, thus increasing the reliability of thin film transistors.

公开(公告)号：US6159779A

公开(公告)日：2000-12-12

申请号：US243155

申请日：1999-02-03

申请人： Tinghui Huang ,  Jeng-Hung Sun

发明人： Tinghui Huang ,  Jeng-Hung Sun

IPC分类号： H01L21/336 ,  H01L29/49 ,  H01L29/786 ,  H01L21/00

CPC分类号： H01L29/66765 ,  H01L29/4908 ,  H01L29/78636

摘要： A method for fabricating a thin film transistor that has a multi-layered gate structure of large thickness and the transistors formed are disclosed. In the method, an organic polymeric material layer is spin-coated to planarize a metal gate that has a second metal material deposited in a thin layer on the gate. A suitable metal coating material is molybdenum. A novel planarization process by dry etching is then carried out utilizing a UV spectrum of Mo in an end point detection method to remove all the organic polymeric material from a top planar surface of the metal gate (and the metal coating layer) and then stopping the dry etching process. A dielectric material layer such as silicon nitride is then deposited on top of the metal gate and the remaining organic polymeric material layer to complete the isolation process for the gate. The present invention novel method of utilizing an additional metal coating layer on the metal gate therefore allows an easy identification of the end point in the planarization process wherein an organic polymeric material layer provides a base for depositing a dielectric material thereon for insulating the metal gate. Problems normally associated with the conventional method of insulating a thick metal gate, such as step coverage and void formation problems are thus eliminated in the present invention method.

公开(公告)号：US20090135151A1

公开(公告)日：2009-05-28

申请号：US12275730

申请日：2008-11-21

申请人： Jeng-Hung Sun

发明人： Jeng-Hung Sun

IPC分类号： G06F3/041

CPC分类号： G06F3/041

摘要： A touch panel includes: a transparent substrate; and a transparent multi-layered structure disposed on the substrate and including transparent inner and outer anti-reflection layers and a transparent touch control layer that is sandwiched between the inner and outer anti-reflection layers and that is made from an electrically conductive material. The inner anti-reflection layer has an anti-reflection film. At least one of the outer anti-reflection layer and the anti-reflection film has an optical thickness sufficient for generating destructive interference among reflections from the substrate, the outer anti-reflection layer, the anti-reflection film, and the touch control layer.

摘要翻译： 触摸面板包括：透明基板; 以及透明多层结构，其设置在所述基板上，并且包括透明的内外防反射层和透明触摸控制层，所述透明触摸控制层夹在所述内反射层之间并且由导电材料制成。 内防反射层具有防反射膜。 外部防反射层和防反射膜中的至少一个具有足够的光学厚度，用于在从基板，外部防反射层，抗反射膜和触摸控制层的反射之间产生相消干涉。

公开(公告)号：US20060138936A1

公开(公告)日：2006-06-29

申请号：US11305633

申请日：2005-12-16

申请人： Din-Guo Chen ,  Jeng-Hung Sun ,  Shyuan-Jeng Ho

发明人： Din-Guo Chen ,  Jeng-Hung Sun ,  Shyuan-Jeng Ho

IPC分类号： H01J63/04 ,  H01J1/62

CPC分类号： H01J29/481 ,  H01J31/127 ,  H01J2201/30446

摘要： An FED using polycrystalline silicon film emitters has a substrate divided into a plurality of pixel regions, a plurality of polycrystalline silicon film emitters disposed within the pixel regions of the substrate, a cathode layer disposed on the substrate, a faceplate disposed above the substrate, and an anode layer disposed between the substrate and the faceplate.

摘要翻译： 使用多晶硅膜发射体的FED具有分成多个像素区域的基板，设置在基板的像素区域内的多个多晶硅膜发射体，设置在基板上的阴极层，设置在基板上方的面板，以及 设置在基板和面板之间的阳极层。

公开(公告)号：US20090135159A1

公开(公告)日：2009-05-28

申请号：US12275698

申请日：2008-11-21

申请人： Jeng-Hung Sun

发明人： Jeng-Hung Sun

IPC分类号： G06F3/045 ,  G06F3/041

CPC分类号： G06F3/044 ,  G06F3/0412 ,  G06F2203/04111

摘要： A touch panel assembly includes: a transparent front cover adapted to cover a screen of a display; and a touch control unit including a transparent multi-layered structure deposited on the transparent front cover. The multi-layered structure defines a plurality of transparent sensor areas, each of which is operable to sense an object when the object touches or closely approaches a location on the transparent front cover that corresponds to the respective one of the sensor areas.

摘要翻译： 触摸面板组件包括：适于覆盖显示器的屏幕的透明前盖; 以及包括沉积在透明前盖上的透明多层结构的触摸控制单元。 多层结构限定了多个透明传感器区域，每个透明传感器区域可操作以在物体接触或紧密接近透明前盖上对应于相应传感器区域的位置时感测物体。