摘要:
A display substrate includes a base substrate, a conductive line on the base substrate, a switching element and a testing member. The switching element includes a first electrode formed on the semiconductor layer pattern and electrically connected to the conductive line, and a second electrode spaced apart from the first electrode and semiconductor layer pattern. The testing member includes a conductive line testing portion that is formed from the same layer as the conductive line and an electrode testing portion that is formed from the same layer as the first electrode. The conductive line testing portion and the electrode testing portion have substantially the same width as the conductive line and the first electrode, respectively. The testing member also includes a semiconductor layer testing portion. The display substrate lends itself to efficient manufacturing with reduced process time and cost.
摘要:
A display substrate includes a base substrate, a conductive line on the base substrate, a switching element and a testing member. The switching element includes a first electrode formed on the semiconductor layer pattern and electrically connected to the conductive line, and a second electrode spaced apart from the first electrode and semiconductor layer pattern. The testing member includes a conductive line testing portion that is formed from the same layer as the conductive line and an electrode testing portion that is formed from the same layer as the first electrode. The conductive line testing portion and the electrode testing portion have substantially the same width as the conductive line and the first electrode, respectively. The testing member also includes a semiconductor layer testing portion. The display substrate lends itself to efficient manufacturing with reduced process time and cost.
摘要:
A method of manufacturing a thin film transistor array panel is provided, which includes: forming a gate line on a substrate; depositing a gate insulating layer and a semiconductor layer in sequence on the gate line; depositing a lower conductive film and an upper conductive film on the semiconductor layer; photo-etching the upper conductive film, the lower conductive film, and the semiconductor layer; depositing a passivation layer; photo-etching the passivation layer to expose first and second portions of the upper conductive film; removing the first and the second portions of the upper conductive film to expose first and second portions of the lower conductive film; forming a pixel electrode and a pair of redundant electrodes on the first and the second portions of the lower conductive film, respectively, the redundant electrodes exposing a part of the second portion of the lower conductive film; removing the exposed part of the second portion of the lower conductive film to expose a portion of the semiconductor layer; and forming a columnar spacer on the exposed portion of the semiconductor layer.
摘要:
A method of manufacturing a thin film transistor array panel is provided, which includes: forming a gate line on a substrate; depositing a gate insulating layer and a semiconductor layer in sequence on the gate line; depositing a lower conductive film and an upper conductive film on the semiconductor layer; photo-etching the upper conductive film, the lower conductive film, and the semiconductor layer; depositing a passivation layer; photo-etching the passivation layer to expose first and second portions of the upper conductive film; removing the first and the second portions of the upper conductive film to expose first and second portions of the lower conductive film; forming a pixel electrode and a pair of redundant electrodes on the first and the second portions of the lower conductive film, respectively, the redundant electrodes exposing a part of the second portion of the lower conductive film; removing the exposed part of the second portion of the lower conductive film to expose a portion of the semiconductor layer; and forming a columnar spacer on the exposed portion of the semiconductor layer.
摘要:
A method of manufacturing a thin film transistor array panel is provided, which includes: forming a gate line on a substrate; depositing a gate insulating layer and a semiconductor layer in sequence on the gate line; depositing a lower conductive film and an upper conductive film on the semiconductor layer; photo-etching the upper conductive film, the lower conductive film, and the semiconductor layer; depositing a passivation layer; photo-etching the passivation layer to expose first and second portions of the upper conductive film; removing the first and the second portions of the upper conductive film to expose first and second portions of the lower conductive film; forming a pixel electrode and a pair of redundant electrodes on the first and the second portions of the lower conductive film, respectively, the redundant electrodes exposing a part of the second portion of the lower conductive film; removing the exposed part of the second portion of the lower conductive film to expose a portion of the semiconductor layer; and forming a columnar spacer on the exposed portion of the semiconductor layer.
摘要:
A method of manufacturing a thin film transistor array panel is provided, which includes: forming a gate line on a substrate; depositing a gate insulating layer and a semiconductor layer in sequence on the gate line; depositing a lower conductive film and an upper conductive film on the semiconductor layer; photo-etching the upper conductive film, the lower conductive film, and the semiconductor layer; depositing a passivation layer; photo-etching the passivation layer to expose first and second portions of the upper conductive film; removing the first and the second portions of the upper conductive film to expose first and second portions of the lower conductive film; forming a pixel electrode and a pair of redundant electrodes on the first and the second portions of the lower conductive film, respectively, the redundant electrodes exposing a part of the second portion of the lower conductive film; removing the exposed part of the second portion of the lower conductive film to expose a portion of the semiconductor layer; and forming a columnar spacer on the exposed portion of the semiconductor layer.
摘要:
Disclosed in a positive active material for a lithium secondary battery including a compound represented by formula 1 and having a 10% to 70% ratio of diffracted intensity of diffraction lines in 2θ=53° (104 plane) with respect to diffracted intensity of diffraction lines in the vicinity of 2θ=22° (003 plane) in X-ray diffraction patterns using a CoKα-ray, LixCoO2-yAy (1) wherein, x is from 0.90 to 1.04, y is from 0 to 0.5, and A is selected from the group consisting of F, S and P.
摘要:
Disclosed in a positive active material for a lithium secondary battery including a compound represented by formula 1 and having a 10% to 70% ratio of diffracted intensity of diffraction lines in 2θ=53° (104 plane) with respect to diffracted intensity of diffraction lines in the vicinity of 2θ=22° (003 plane) in X-ray diffraction patterns using a CoKα-ray, LixCoO2-yAy (1) wherein, x is from 0.90 to 1.04, y is from 0 to 0.5, and A is selected from the group consisting of F, S and P.
摘要:
A cathode active material for a lithium rechargeable battery is provided. The cathode active material is used for a lithium rechargeable battery containing a cathode, an anode, and an electrolytic solution. The cathode active material is composed of 0.5% by weight or less carbonate ion (CO32−) plus bicarbonate ion (HCO3−) and 0.1% by weight or less hydroxyl ion (OH−). The swelling of lithium battery containing the cathode active material is substantially suppressed when is placed at 60° C. or more.
摘要:
Disclosed in a positive active material for a lithium secondary battery including a compound represented by formula 1 and having a 10% to 70% ratio of diffracted intensity of diffraction lines in 2θ=53° (104 plane) with respect to diffracted intensity of diffraction lines in the vicinity of 2θ=22° (003 plane) in X-ray diffraction patterns using a CoKα-ray, LixCoO2-yAy (1)wherein, x is from 0.90 to 1.04, y is from 0 to 0.5, and A is selected from the group consisting of F, S and P.