公开(公告)号：US20100067042A1

公开(公告)日：2010-03-18

申请号：US12461850

申请日：2009-08-26

申请人： Junichi Ikeda ,  Koji Oshikiri ,  Koji Takeo ,  Tetsuya Sato ,  Yosuke Kawamura ,  Hiroyuki Takahashi

发明人： Junichi Ikeda ,  Koji Oshikiri ,  Koji Takeo ,  Tetsuya Sato ,  Yosuke Kawamura ,  Hiroyuki Takahashi

IPC分类号： G06F15/00

CPC分类号： H04N1/2307 ,  H04N1/00912 ,  H04N1/00933 ,  H04N1/32 ,  H04N1/32582 ,  H04N1/32587 ,  H04N1/32593 ,  H04N2201/0082

摘要： A plotter repeats a process of standing by until the next line synchronization timing after data transfer for one line and transferring DMAC control information requesting data transfer for one line to an MCH for each line synchronization timing whereby image data for one page is transferred. Therefore, data transfer from the MCH to the plotter is processed by continuous posted requests, so that float with respect to a line period can be made longer without transmitting a plurality of data transfer requests from the plotter to the MCH in the split method. Thus, a high data transfer performance can be realized with an inexpensive circuit because the cost for mounting a buffer memory or the like on the circuit is not needed.

摘要翻译： 绘图仪重复进行直到一行的数据传送之后的下一行同步定时的处理，并且将用于一行的DMAC控制信息请求数据传送到每个行同步定时的MCH，由此传送一页的图像数据。 因此，通过连续发送的请求来处理从MCH到绘图机的数据传送，使得可以使得相对于行周期的浮动可以更长，而在分割方法中不将多个数据传送请求从绘图仪发送到MCH。 因此，由于不需要在电路上安装缓冲存储器等的成本，所以可以用廉价的电路实现高数据传输性能。

公开(公告)号：US07536489B2

公开(公告)日：2009-05-19

申请号：US11511477

申请日：2006-08-29

申请人： Koji Oshikiri ,  Noriyuki Terao ,  Junichi Ikeda ,  Koji Takeo

发明人： Koji Oshikiri ,  Noriyuki Terao ,  Junichi Ikeda ,  Koji Takeo

IPC分类号： H04J3/16 ,  H04J3/24 ,  G06F3/00 ,  G06F5/00

CPC分类号： G06F13/4278 ,  G06F2213/0026

摘要： An information processing system includes a high-speed serial bus that transmits and receives data independently over communication channels via a tree-structured network including a point-to-point connection, and a control unit that issues a request command based on a request synchronization signal for data with a timing constraint on line synchronous transfer by a line synchronization signal to transmit a plurality of data, including the data with the timing constraint, simultaneously via the high-speed serial bus.

摘要翻译： 一种信息处理系统，包括：高速串行总线，其经由包括点对点连接的树结构化网络在通信信道上独立地发送和接收数据;以及控制单元，其基于请求同步信号发出请求命令 对于具有通过线路同步信号的线路同步传输的定时约束的数据，以经由高速串行总线同时发送包括具有定时约束的数据的多个数据。

公开(公告)号：US20060227143A1

公开(公告)日：2006-10-12

申请号：US11399440

申请日：2006-04-07

申请人： Yutaka Maita ,  Junichi Ikeda ,  Satoru Numakura ,  Atsuhiro Oizumi ,  Koji Oshikiri ,  Tohru Sasaki ,  Yasuyuki Shindoh ,  Koji Takeo ,  Noriyuki Terao

发明人： Yutaka Maita ,  Junichi Ikeda ,  Satoru Numakura ,  Atsuhiro Oizumi ,  Koji Oshikiri ,  Tohru Sasaki ,  Yasuyuki Shindoh ,  Koji Takeo ,  Noriyuki Terao

IPC分类号： G06T1/00

CPC分类号： H04N1/00236

摘要： An image forming apparatus includes an image input device that reads an image to obtain image data and a printer engine that forms an image on a medium based on image data. A bus of a PCI Express standard is used to transfer data. Storage areas serving as end points of the standard and hardware resources that transmit data and receive image data to and from the storage areas are connected to an identical switch according to the PCI Express standard. Specifically, an input/output area, an image input device, and a printer engine are connected to one switch, and a storage area, a compressor, and a hard disk is connected to another switch.

摘要翻译： 图像形成装置包括：图像输入装置，其读取图像以获得图像数据;以及打印机引擎，其基于图像数据在介质上形成图像。 PCI Express标准的总线用于传输数据。 作为向存储区域发送数据和从存储区域接收图像数据的标准和硬件资源的端点的存储区域根据PCI Express标准连接到相同的交换机。 具体地，输入/输出区域，图像输入装置和打印机引擎连接到一个开关，并且存储区域，压缩器和硬盘连接到另一个开关。

公开(公告)号：US20060209722A1

公开(公告)日：2006-09-21

申请号：US11327426

申请日：2006-01-09

申请人： Koji Takeo ,  Noriyuki Terao ,  Junichi Ikeda ,  Koji Oshikiri

发明人： Koji Takeo ,  Noriyuki Terao ,  Junichi Ikeda ,  Koji Oshikiri

IPC分类号： H04L12/28

CPC分类号： H04L12/2854

摘要： A data transferring system, in which processes to match settings between devices mutually communicating are simplified, software for the processes is also simplified, and the amount of data to be processed is reduced, is disclosed. In a data transferring system of the PCI Express standard, when settings between facing ports of a switch and an end point are changed, a setting change is transmitted to the port of the end point being one of the facing ports by a configuration request. The port of the end point transmits the setting change to the port of the switch by a message request and the port of the switch executes the setting change. The port of the switch sends a completion message signifying the setting change completion to the port of the end point by a message request. The port of the end point executes the setting change.

摘要翻译： 公开了一种数据传送系统，其中相互通信的设备之间的设置匹配的过程被简化，用于处理的软件也被简化，并且减少了要处理的数据量。 在PCI Express标准的数据传输系统中，当交换机的相对端口和端点之间的设置发生变化时，通过配置请求将设置更改发送到作为其中一个端口的端点的端口。 终端端口通过消息请求将设置更改发送到交换机的端口，交换机的端口执行设置更改。 交换机的端口通过消息请求向终端的端口发送表示设置更改完成的完成消息。 终点端口执行设置更改。

公开(公告)号：US20060171300A1

公开(公告)日：2006-08-03

申请号：US11332203

申请日：2006-01-17

申请人： Koji Oshikiri ,  Junichi Ikeda ,  Koji Takeo ,  Noriyuki Terao

发明人： Koji Oshikiri ,  Junichi Ikeda ,  Koji Takeo ,  Noriyuki Terao

IPC分类号： H04J3/14

CPC分类号： G06F13/4291 ,  Y02D10/14 ,  Y02D10/151

摘要： A data transferring system based on the PCI Express standard in which power saving is realized is disclosed. In the data transferring system, a data transferring device transfers image data based on the PCI Express standard by synchronizing with a line synchronizing signal LSYNC. At this time, the data transferring device causes a period between packets (image data) to be transferred in one line cycle of the line synchronizing signal LSYNC to be shorter than a transition period “t1” which is required to transit from a link state L0 to a link state L0s and from the link state L0s to the link state L0. With this, the number of the transition periods “t1” is reduced and the period of the link state L0s is made long.

摘要翻译： 公开了一种基于实现省电的PCI Express标准的数据传输系统。 在数据传送系统中，数据传送装置通过与行同步信号LSYNC同步，基于PCI Express标准传送图像数据。 此时，数据传送装置使得在行同步信号LSYNC的一个行周期中传送的分组（图像数据）之间的周期短于从链接状态过渡所需的过渡期间“t 1” L 0到链路状态L 0 s，并且从链路状态L 0 s到链路状态L 0。 由此，过渡期间“t 1”的数量减少，链路状态L 0 s的周期变长。

公开(公告)号：US20070088873A1

公开(公告)日：2007-04-19

申请号：US11511477

申请日：2006-08-29

申请人： Koji Oshikiri ,  Noriyuki Terao ,  Junichi Ikeda ,  Koji Takeo

发明人： Koji Oshikiri ,  Noriyuki Terao ,  Junichi Ikeda ,  Koji Takeo

IPC分类号： G06F3/00

CPC分类号： G06F13/4278 ,  G06F2213/0026

摘要： An information processing system includes a high-speed serial bus that transmits and receives data independently over communication channels via a tree-structured network including a point-to-point connection, and a control unit that issues a request command based on a request synchronization signal for data with a timing constraint on line synchronous transfer by a line synchronization signal to transmit a plurality of data, including the data with the timing constraint, simultaneously via the high-speed serial bus.

摘要翻译： 一种信息处理系统，包括：高速串行总线，其经由包括点对点连接的树结构化网络在通信信道上独立地发送和接收数据;以及控制单元，其基于请求同步信号发出请求命令 对于具有通过线路同步信号的线路同步传输的定时约束的数据，以经由高速串行总线同时发送包括具有定时约束的数据的多个数据。

公开(公告)号：US20050254085A1

公开(公告)日：2005-11-17

申请号：US11121060

申请日：2005-05-04

申请人： Koji Oshikiri ,  Yasuyuki Shindoh ,  Junichi Ikeda ,  Koji Takeo ,  Noriyuki Terao ,  Atsuhiro Oizumi ,  Yutaka Maita ,  Satoru Numakura ,  Tohru Sasaki

发明人： Koji Oshikiri ,  Yasuyuki Shindoh ,  Junichi Ikeda ,  Koji Takeo ,  Noriyuki Terao ,  Atsuhiro Oizumi ,  Yutaka Maita ,  Satoru Numakura ,  Tohru Sasaki

IPC分类号： G06F15/00 ,  G09G5/02

CPC分类号： G06F3/13

摘要： An image forming system comprising a serial communication control part, an image input part, an image output part, an image processing part, a storage part, a printer controller, and a high-speed serial bus. The high-speed serial bus mutually couples the serial communication control part and at least one of the image input part, the image output part, the image processing part, the storage part and the printer controller.

摘要翻译： 一种图像形成系统，包括串行通信控制部分，图像输入部分，图像输出部分，图像处理部分，存储部分，打印机控制器和高速串行总线。 高速串行总线将串行通信控制部分与图像输入部分，图像输出部分，图像处理部分，存储部分和打印机控制器中的至少一个相互耦合。

公开(公告)号：US07813362B2

公开(公告)日：2010-10-12

申请号：US11327460

申请日：2006-01-09

申请人： Junichi Ikeda ,  Koji Oshikiri ,  Koji Takeo ,  Noriyuki Terao

发明人： Junichi Ikeda ,  Koji Oshikiri ,  Koji Takeo ,  Noriyuki Terao

IPC分类号： H04L12/00

CPC分类号： H04L49/901 ,  H04L47/10 ,  H04L47/30 ,  H04L49/30 ,  H04L49/90 ,  H04L2012/5681

摘要： A communication apparatus is disclosed that includes a transmission circuit configured to transmit transmission data to a communication counterpart; a reception circuit configured to receive reception data from the communication counterpart; a storage device configured as at least two buffers including a transmission buffer that stores the transmission data and a reception buffer that stores the reception data; and an address mapping unit configured to perform address mapping of the buffers including the transmission buffer and the reception buffer on the storage device, and adjust the storage capacity of the transmission buffer and the storage capacity of the reception buffer.

摘要翻译： 公开了一种通信装置，其包括被配置为向通信对方发送传输数据的传输电路; 接收电路，被配置为从所述通信对方接收接收数据; 配置为包括存储发送数据的发送缓冲器和存储接收数据的接收缓冲器的至少两个缓冲器的存储装置; 以及地址映射单元，被配置为在存储装置上执行包括发送缓冲器和接收缓冲器的缓冲器的地址映射，并且调整发送缓冲器的存储容量和接收缓冲器的存储容量。

公开(公告)号：US07755791B2

公开(公告)日：2010-07-13

申请号：US11399440

申请日：2006-04-07

申请人： Yutaka Maita ,  Junichi Ikeda ,  Satoru Numakura ,  Atsuhiro Oizumi ,  Koji Oshikiri ,  Tohru Sasaki ,  Yasuyuki Shindoh ,  Koji Takeo ,  Noriyuki Terao

发明人： Yutaka Maita ,  Junichi Ikeda ,  Satoru Numakura ,  Atsuhiro Oizumi ,  Koji Oshikiri ,  Tohru Sasaki ,  Yasuyuki Shindoh ,  Koji Takeo ,  Noriyuki Terao

IPC分类号： G06F3/12 ,  G06K15/00

CPC分类号： H04N1/00236

摘要： An image forming apparatus includes an image input device that reads an image to obtain image data and a printer engine that forms an image on a medium based on image data. A bus of a PCI Express standard is used to transfer data. Storage areas serving as end points of the standard and hardware resources that transmit data and receive image data to and from the storage areas are connected to an identical switch according to the PCI Express standard. Specifically, an input/output area, an image input device, and a printer engine are connected to one switch, and a storage area, a compressor, and a hard disk is connected to another switch.

摘要翻译： 图像形成装置包括：图像输入装置，其读取图像以获得图像数据;以及打印机引擎，其基于图像数据在介质上形成图像。 PCI Express标准的总线用于传输数据。 作为向存储区域发送数据和从存储区域接收图像数据的标准和硬件资源的端点的存储区域根据PCI Express标准连接到相同的交换机。 具体地，输入/输出区域，图像输入装置和打印机引擎连接到一个开关，并且存储区域，压缩器和硬盘连接到另一个开关。

公开(公告)号：US07454540B2

公开(公告)日：2008-11-18

申请号：US11332203

申请日：2006-01-17

申请人： Koji Oshikiri ,  Junichi Ikeda ,  Koji Takeo ,  Noriyuki Terao

发明人： Koji Oshikiri ,  Junichi Ikeda ,  Koji Takeo ,  Noriyuki Terao

IPC分类号： G06F3/00

CPC分类号： G06F13/4291 ,  Y02D10/14 ,  Y02D10/151

摘要： A data transferring system based on the PCI Express standard in which power saving is realized is disclosed. In the data transferring system, a data transferring device transfers image data based on the PCI Express standard by synchronizing with a line synchronizing signal LSYNC. At this time, the data transferring device causes a period between packets (image data) to be transferred in one line cycle of the line synchronizing signal LSYNC to be shorter than a transition period “t1” which is required to transit from a link state L0 to a link state L0s and from the link state L0s to the link state L0. With this, the number of the transition periods “t1” is reduced and the period of the link state L0s is made long.

摘要翻译： 公开了一种基于实现省电的PCI Express标准的数据传输系统。 在数据传送系统中，数据传送装置通过与行同步信号LSYNC同步，基于PCI Express标准传送图像数据。 此时，数据传送装置使得在行同步信号LSYNC的一个行周期中传送的分组（图像数据）之间的周期短于从链接状态过渡所需的过渡期间“t 1” L 0到链路状态L 0 s，并且从链路状态L 0 s到链路状态L 0。 由此，过渡期间“t 1”的数量减少，链路状态L 0 s的周期变长。