公开(公告)号：US4760287A

公开(公告)日：1988-07-26

申请号：US27404

申请日：1987-03-18

申请人： Junkei Goto ,  Masayuki Sahoda ,  Tetsuya Iida

发明人： Junkei Goto ,  Masayuki Sahoda ,  Tetsuya Iida

IPC分类号： G01R19/165 ,  G01R19/257 ,  G06G7/14 ,  H03K5/24 ,  H03M1/38

CPC分类号： G06G7/14 ,  H03K5/249

摘要： In the comparator circuit, the amplifier circuit is comprised of an inverting amplifier section having a high gain and a noninverting amplifier section having a low output impedance. Therefore, the comparator circuit has a high input sensitivity. The comparator circuit can also operate at a high speed.

摘要翻译： 在比较器电路中，放大器电路包括具有高增益的反相放大器部分和具有低输出阻抗的非反相放大器部分。 因此，比较器电路具有高输入灵敏度。 比较器电路也可以高速运行。

公开(公告)号：US4958222A

公开(公告)日：1990-09-18

申请号：US363759

申请日：1989-06-09

申请人： Hiroshi Takakura ,  Tetsuya Iida ,  Junkei Goto

发明人： Hiroshi Takakura ,  Tetsuya Iida ,  Junkei Goto

IPC分类号： H01L23/52 ,  H01L21/3205 ,  H01L23/522 ,  H01L23/528 ,  H01L27/02 ,  H01L29/40

CPC分类号： H01L23/5286 ,  H01L23/5222 ,  H01L23/5225 ,  H01L23/5226 ,  H01L27/0203 ,  H01L2924/0002

摘要： A signal interference prevention wiring is disposed between two wirings which are arranged in parallel for transmitting a signal, and the signal interference prevention wiring is held at a constant potential.

公开(公告)号：US4908624A

公开(公告)日：1990-03-13

申请号：US216046

申请日：1988-07-07

申请人： Junkei Goto ,  Tetsuya Iida

发明人： Junkei Goto ,  Tetsuya Iida

IPC分类号： H03M1/38 ,  H03M1/00

CPC分类号： H03M1/06 ,  H03M1/468

摘要： A successive approximation type A/D converter of the present invention has a capacitor having a predetermined capacitance value and arranged between an input terminal of a voltage comparator and a fixed potential terminal having a predetermined potential. According to the successive approximation type A/D converter of the present invention, the capacitor arranged between the input terminal of the voltage comparator and the fixed potential terminal having the predetermined potential prevents a potential at the input node of the voltage comparator from being greatly changed to exceed a power source voltage range due the influences of a local D/A converter when the sample mode is switched to the approximation mode. Therefore, the leakage of charges stored in the input side of the voltage comparator can be prevented. Accordingly, even if the amplitude of an analog input voltage is equal to the amplitude of the power source voltage, high-precision A/D conversion can still be performed.

公开(公告)号：US5006852A

公开(公告)日：1991-04-09

申请号：US355609

申请日：1989-05-23

申请人： Junkei Goto ,  Tetsuya Iida

发明人： Junkei Goto ,  Tetsuya Iida

IPC分类号： H03M1/38 ,  H03M1/00

CPC分类号： H03M1/0845 ,  H03M1/46

摘要： This invention discloses an analog-to-digital converter. Current supply paths are branched at the current supply terminals from the other current paths so as to be connected exclusively to the analog voltage comparator. And a circuit block of the analog voltage comparator is positioned closer to the current supply terminals than the other circuit block of DA converter, sequential comparison register, etc.

公开(公告)号：US5495185A

公开(公告)日：1996-02-27

申请号：US435325

申请日：1995-05-05

申请人： Junkei Goto

发明人： Junkei Goto

IPC分类号： H03K19/0185 ,  G11C11/409 ,  H03K19/003 ,  H03K19/0948

CPC分类号： H03K19/00315

摘要： The current paths of the P-channel transistor, P-channel transistor, and N-channel transistor are connected in series between the power source V.sub.DD and the ground. The inverter circuit is constituted by the transistors. The node of the inverter circuit is connected to an end of the current path of the N-channel transistor. Another end of the current path of the N-channel transistor is connected to the input node. The transistors are of the enhancement type. If the electric potential higher than the power source V.sub.DD is supplied to the input node, the voltage of the node is lower than that of the power source V.sub.DD by the threshold voltage (V.sub.THN) and the transistors are protected from destruction.

摘要翻译： P沟道晶体管，P沟道晶体管和N沟道晶体管的电流路径串联在电源VDD和地之间。 逆变器电路由晶体管构成。 逆变器电路的节点连接到N沟道晶体管的电流路径的一端。 N沟道晶体管的电流路径的另一端连接到输入节点。 晶体管是增强型的。 如果高于电源VDD的电位被提供给输入节点，则节点的电压低于电源VDD的电压阈值电压（VTHN），并且保护晶体管免受破坏。

公开(公告)号：US5254994A

公开(公告)日：1993-10-19

申请号：US845652

申请日：1992-03-04

申请人： Hiroshi Takakura ,  Junkei Goto

发明人： Hiroshi Takakura ,  Junkei Goto

IPC分类号： H03K17/041 ,  H03M1/66

CPC分类号： H03K17/04106

摘要： A segment control type D to A converter includes a decoder and a plurality of current source cells. The decoder decodes a digital input signal to generate a control signal. The plurality of current source cells are selected by the control signal output from the decoder. A current output from the selected current source cell is output from an output terminal. Each of the current source cells includes first and second transistors. One terminal of the current path of the first transistor is connected to a constant current source, and the first transistor is ON/OFF controlled such that the gate of the transistor receives the control signal output from the decoder. One terminal of the current path of the second transistor is connected to the other terminal of the current path of the first transistor, and the other terminal of the second transistor is connected to the output terminal. A reference voltage is applied to the gate of the second transistor to cause the second transistor to be normally set in an ON state.

摘要翻译： 段控制类型D到A转换器包括解码器和多个电流源单元。 解码器解码数字输入信号以产生控制信号。 通过从解码器输出的控制信号来选择多个电流源单元。 从选择的电流源单元的电流输出从输出端子输出。 每个电流源单元包括第一和第二晶体管。 第一晶体管的电流路径的一个端子连接到恒流源，并且第一晶体管被开/关控制，使得晶体管的栅极接收从解码器输出的控制信号。 第二晶体管的电流路径的一个端子连接到第一晶体管的电流路径的另一个端子，而第二晶体管的另一个端子连接到输出端子。 参考电压被施加到第二晶体管的栅极，以使第二晶体管正常地设置在导通状态。