VARIABLE RESISTANCE MEMORY AND THE METHOD OF CONTROLLING THE SAME
    1.
    发明申请
    VARIABLE RESISTANCE MEMORY AND THE METHOD OF CONTROLLING THE SAME 审中-公开
    可变电阻记忆及其控制方法

    公开(公告)号:US20150263068A1

    公开(公告)日:2015-09-17

    申请号:US14479018

    申请日:2014-09-05

    发明人: Yuichi ITO

    摘要: According to one embodiment, a variable resistance memory including a bit line extending in a first direction, a word line extending in a second direction, and a memory cell array including memory cells, each of the memory cells including a variable resistance element and a selective transistor, the element being configured to store two-bit data using a change in resistance, the element being connected to the bit line, a gate of the selective transistor being connected to the word line, wherein a first and a second write current are selectively applied to the element, to enable the data to be written, and a first and a second read current are selectively applied to the element, to enable the data to be read.

    摘要翻译: 根据一个实施例,包括沿第一方向延伸的位线的可变电阻存储器,在第二方向上延伸的字线和包括存储器单元的存储单元阵列,每个存储器单元包括可变电阻元件和选择性 晶体管,元件被配置为使用电阻变化来存储两位数据,元件连接到位线,选择晶体管的栅极连接到字线,其中第一和第二写入电流是选择性地 应用于该元件,以使数据能被写入,并且第一和第二读取电流被选择性地应用于该元件,以使得能够读取数据。

    SEMICONDUCTOR MEMORY DEVICE
    2.
    发明申请

    公开(公告)号:US20170263850A1

    公开(公告)日:2017-09-14

    申请号:US15261828

    申请日:2016-09-09

    发明人: Yuichi ITO

    摘要: In general, according to one embodiment, a semiconductor memory device includes: first and second variable resistance elements provided above a semiconductor layer; a first insulation layer provided on top surfaces and side surfaces of the first and the second variable resistance elements; and a first interconnect extending in a first direction and provided on the first insulation layer, at least a portion of the first interconnect being opposed to the side surfaces of the first and second variable resistance elements via the first insulation layer.

    SEMICONDUCTOR DEVICE
    3.
    发明申请

    公开(公告)号:US20180082138A1

    公开(公告)日:2018-03-22

    申请号:US15447120

    申请日:2017-03-02

    发明人: Yuichi ITO

    IPC分类号: G06K9/03 G06K9/00 G06K9/64

    摘要: According to one embodiment, a semiconductor device for processing image data of an image includes an image processing circuit comprising circuit elements configured to process the image data and output first image data, a processor configured to process the image data using arithmetic processing software and output second image data, and a comparison unit configured to compare the first image data and the second image data and output a detection signal indicating whether or not the first image data and the second image data match each other.