公开(公告)号：US11665908B2

公开(公告)日：2023-05-30

申请号：US17028748

申请日：2020-09-22

Applicant: Kioxia Corporation

Inventor： Haruka Sakuma ,  Hidenori Miyagawa ,  Shosuke Fujii ,  Kiwamu Sakuma ,  Fumitaka Arai ,  Kunifumi Suzuki

IPC: H01L21/28 ,  H01L27/11597 ,  H01L29/51 ,  H01L27/1159

CPC classification number: H01L27/11597 ,  H01L27/1159 ,  H01L29/40111 ,  H01L29/516

Abstract: A semiconductor memory device comprises: a substrate; a first semiconductor portion provided separated from the substrate in a first direction intersecting a surface of the substrate, the first semiconductor portion extending in a second direction intersecting the first direction; a first gate electrode extending in the first direction; a first insulating portion which is provided between the first semiconductor portion and the first gate electrode, includes hafnium (Hf) and oxygen (O), and includes an orthorhombic crystal as a crystal structure; a first conductive portion provided between the first semiconductor portion and the first insulating portion; and a second insulating portion provided between the first semiconductor portion and the first conductive portion. An area of a facing surface of the first conductive portion facing the first semiconductor portion is larger than an area of a facing surface of the first conductive portion facing the first gate electrode.

公开(公告)号：US11430500B2

公开(公告)日：2022-08-30

申请号：US17189097

申请日：2021-03-01

Applicant: KIOXIA CORPORATION

Inventor： Haruka Sakuma ,  Kiwamu Sakuma ,  Masumi Saitoh

IPC: G11C11/22 ,  H01L29/51 ,  H01L27/11592 ,  H01L27/11587 ,  H01L27/1159

Abstract: A semiconductor storage device includes a plurality of gate electrodes, a semiconductor layer facing the plurality of gate electrodes, a gate insulating layer arranged between each of the plurality of gate electrodes and the semiconductor layer. The gate insulating layer contains oxygen (O) and hafnium (Hf) and has an orthorhombic crystal structure. A plurality of first wirings is connected to the respective gate electrodes. A controller is configured to execute a write sequence and an erasing sequence by applying certain voltages to at least one of the first wirings. The controller is further configured to increase either a program voltage to be applied to the first wirings in the write sequence or an application time of the program voltage in the write sequence after a total number of executions of the write sequence or the erasing sequence has reached a particular number.