公开(公告)号：US12219889B2

公开(公告)日：2025-02-04

申请号：US17679948

申请日：2022-02-24

Applicant: KIOXIA CORPORATION

Inventor： Masahiro Takahashi ,  Yoshiaki Asao ,  Yukihiro Nomura ,  Daisaburo Takashima

IPC: H10N70/00 ,  G11C13/00 ,  H10B63/00 ,  H10N70/20

Abstract: A semiconductor storage device includes a memory cell including a core portion that extends in a first direction above a semiconductor substrate; a variable resistance layer that extends in the first direction and is in contact with the core portion; a semiconductor layer that extends in the first direction and is in contact with the variable resistance layer; a first insulator layer that extends in the first direction and is in contact with the semiconductor layer; and a first voltage applying electrode that extends in a second direction orthogonal to the first direction and is in contact with the first insulator layer. The core portion is a vacuum region, or a region containing inert gas.

公开(公告)号：US11935591B2

公开(公告)日：2024-03-19

申请号：US17549337

申请日：2021-12-13

Applicant: Kioxia Corporation

Inventor： Masahiro Takahashi ,  Hiroshi Ito ,  Ryousuke Takizawa

IPC: G11C13/00 ,  G11C5/06

CPC classification number: G11C13/004 ,  G11C5/06 ,  G11C13/0038 ,  G11C13/0069

Abstract: According to one embodiment, a memory device includes a first wiring line, a second wiring line, a memory cell connected between the first and second wiring lines, including a resistance change memory element having first and second resistance states, and a two-terminal switching element connected in series to the resistance change memory element, and a voltage application circuit which applies a write voltage signal having a first polarity and setting a desired resistance state to the resistance change memory element, to the memory cell, and applies, after the write voltage signal is applied to the memory cell, a second polarity voltage signal having a magnitude that prevents the two-terminal switching element from being set to the on-state, to the memory cell.