公开(公告)号：US20230284460A1

公开(公告)日：2023-09-07

申请号：US17899898

申请日：2022-08-31

Applicant: KIOXIA CORPORATION

Inventor： Tomoki CHIBA ,  Daisaburo TAKASHIMA ,  Hidehiro SHIGA

IPC: H01L27/24 ,  H01L27/22 ,  H01L45/00 ,  G11C11/16 ,  G11C13/00

CPC classification number: H01L27/2454 ,  H01L27/228 ,  H01L27/249 ,  H01L45/06 ,  H01L45/126 ,  H01L45/144 ,  H01L45/146 ,  H01L45/143 ,  G11C11/1673 ,  G11C13/004 ,  G11C2213/71

Abstract: A variable resistance non-volatile memory includes a semiconductor substrate, a first electrode line extending in a first direction away from the semiconductor substrate, a second electrode line extending in the first direction parallel to the first electrode line, an insulating film between the first and second electrode lines, a variable resistance film formed on the first electrode line, a low electrical resistance layer formed on the variable resistance film and having a lower electrical resistance than the variable resistance film, a semiconductor film in contact with the low electrical resistance layer and the insulating film, and formed on opposite surfaces of the second electrode line, a gate insulator film extending in the first direction and in contact with the semiconductor film, and a voltage application electrode that extends in a second direction that crosses the first direction, and is in contact with the gate insulator film.

公开(公告)号：US20230065167A1

公开(公告)日：2023-03-02

申请号：US17681680

申请日：2022-02-25

Applicant: KIOXIA CORPORATION

Inventor： Tomoki CHIBA ,  Daisaburo TAKASHIMA ,  Hidehiro SHIGA

IPC: G11C13/00

Abstract: A nonvolatile memory includes a first memory cell and a second memory cell above the first memory cell. The first memory cell includes a variable resistance layer extending in a first direction, a semiconductor layer extending in the first direction and in contact with the variable resistance layer, an insulator layer extending in the first direction and in contact with the semiconductor layer, and a first voltage applying electrode extending in a second direction and in contact with the insulator layer. The second memory cell includes a second voltage applying electrode in contact with the insulator layer. When a write operation is performed on the first memory cell, a first voltage is applied to the second voltage applying electrode, and when a write operation is performed on the second memory cell, a second voltage, lower than the first voltage, is applied to the first voltage applying electrode.