公开(公告)号：US11430525B2

公开(公告)日：2022-08-30

申请号：US17064952

申请日：2020-10-07

Applicant: KIOXIA CORPORATION

Inventor： Tomoko Araya ,  Mitsuaki Honma

IPC: G11C16/26 ,  G11C16/04 ,  G11C29/52 ,  G11C11/56 ,  G11C11/02 ,  G11C11/06 ,  G06F11/10 ,  G11C16/02 ,  G11C16/06

Abstract: According to one embodiment, a memory device, includes a first memory cell, and a second memory cell adjacent to the first memory cell; and a sequencer configured to, when data is read from the first memory cell: perform a first read operation on the second memory cell; perform a second read operation on the first memory cell; perform a third read operation on the first memory cell by applying a voltage different from that applied in the second read operation to a gate of the second memory cell; and generate first data stored in the first memory cell and second data for correcting the first data, based on results of the first to third read operations.